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-rw-r--r--utils/hwstub/tools/lua/atj.lua3
-rw-r--r--utils/hwstub/tools/lua/atj/gpio.lua65
-rw-r--r--utils/hwstub/tools/lua/atj/lcm.lua31
-rw-r--r--utils/hwstub/tools/lua/irivere150.lua116
-rw-r--r--utils/regtools/desc/regs-atj213x.xml62
5 files changed, 275 insertions, 2 deletions
diff --git a/utils/hwstub/tools/lua/atj.lua b/utils/hwstub/tools/lua/atj.lua
index de725f4a5d..1f59a141fc 100644
--- a/utils/hwstub/tools/lua/atj.lua
+++ b/utils/hwstub/tools/lua/atj.lua
@@ -5,4 +5,5 @@
ATJ = {}
hwstub.soc:select("atj213x")
-
+require "atj/gpio"
+require "atj/lcm"
diff --git a/utils/hwstub/tools/lua/atj/gpio.lua b/utils/hwstub/tools/lua/atj/gpio.lua
new file mode 100644
index 0000000000..970d271187
--- /dev/null
+++ b/utils/hwstub/tools/lua/atj/gpio.lua
@@ -0,0 +1,65 @@
+ATJ.gpio = {}
+
+function ATJ.gpio.muxsel(dev)
+ if type(dev) == "string" then
+ if dev == "LCM" then dev = 0
+ elseif dev == "SD" then dev = 1
+ elseif dev == "NAND" then dev = 2
+ else error("Invalid mux string " .. dev)
+ end
+ end
+
+ local mfctl0 = HW.GPIO.MFCTL0.read()
+ if dev == 0 then
+ -- LCM (taken from WELCOME.BIN)
+ mfctl0 = bit32.band(mfctl0, 0xfe3f3f00)
+ mfctl0 = bit32.bor(mfctl0, 0x00808092)
+ elseif dev == 1 then
+ -- SD (taken from CARD.DRV)
+ mfctl0 = bit32.band(mfctl0, 0xff3ffffc)
+ mfctl0 = bit32.bor(mfctl0, 0x01300004)
+ elseif dev == 2 then
+ -- NAND (taken from BROM dump)
+ mfctl0 = bit32.band(mfctl0, 0xfe3ff300)
+ mfctl0 = bit32.bor(mfctl0, 0x00400449)
+ end
+
+ -- enable multifunction mux
+ HW.GPIO.MFCTL1.write(0x80000000)
+
+ -- write multifunction mux selection
+ HW.GPIO.MFCTL0.write(mfctl0)
+end
+
+function ATJ.gpio.outen(port, pin, en)
+ if type(port) == "string" then
+ if port == "PORTA" then
+ HW.GPIO.AOUTEN.write(bit32.replace(HW.GPIO.AOUTEN.read(), en, pin, 1))
+ elseif port == "PORTB" then
+ HW.GPIO.BOUTEN.write(bit32.replace(HW.GPIO.BOUTEN.read(), en, pin, 1))
+ else error("Invalid port string " .. port)
+ end
+ end
+end
+
+function ATJ.gpio.inen(port, pin)
+ if type(port) == "string" then
+ if port == "PORTA" then
+ HW.GPIO.AINEN.write(bit32.replace(HW.GPIO.AINEN.read(), en, pin, 1))
+ elseif port == "PORTB" then
+ HW.GPIO.BINEN.write(bit32.replace(HW.GPIO.BINEN.read(), en, pin, 1))
+ else error("Invalid port string " .. port)
+ end
+ end
+end
+
+function ATJ.gpio.set(port, pin, val)
+ if type(port) == "string" then
+ if port == "PORTA" then
+ HW.GPIO.ADAT.write(bit32.replace(HW.GPIO.ADAT.read(), val, pin, 1))
+ elseif port == "PORTB" then
+ HW.GPIO.BDAT.write(bit32.replace(HW.GPIO.BDAT.read(), val, pin, 1))
+ else error("Invalid port string " .. port)
+ end
+ end
+end
diff --git a/utils/hwstub/tools/lua/atj/lcm.lua b/utils/hwstub/tools/lua/atj/lcm.lua
new file mode 100644
index 0000000000..feaa8b7158
--- /dev/null
+++ b/utils/hwstub/tools/lua/atj/lcm.lua
@@ -0,0 +1,31 @@
+ATJ.lcm = {}
+
+function ATJ.lcm.wait_fifo_empty()
+ while (bit32.band(HW.YUV2RGB.CTL.read(), 0x04) == 0) do
+ end
+end
+
+function ATJ.lcm.rs_command()
+ ATJ.lcm.wait_fifo_empty()
+ HW.YUV2RGB.CTL.write(0x802ae)
+end
+
+function ATJ.lcm.rs_data()
+ ATJ.lcm.wait_fifo_empty()
+ HW.YUV2RGB.CTL.write(0x902ae)
+end
+
+function ATJ.lcm.fb_data()
+ ATJ.lcm.rs_command()
+ HW.YUV2RGB.FIFODATA.write(0x22)
+ HW.YUV2RGB.CTL.write(0xa02ae)
+end
+
+function ATJ.lcm.init()
+ HW.CMU.DEVCLKEN.write(bit32.bor(HW.CMU.DEVCLKEN.read(), 0x102))
+ ATJ.gpio.muxsel("LCM")
+ hwstub.udelay(1)
+ ATJ.lcm.rs_command()
+ HW.YUV2RGB.CLKCTL.write(0x102)
+end
+
diff --git a/utils/hwstub/tools/lua/irivere150.lua b/utils/hwstub/tools/lua/irivere150.lua
new file mode 100644
index 0000000000..e5a0d26686
--- /dev/null
+++ b/utils/hwstub/tools/lua/irivere150.lua
@@ -0,0 +1,116 @@
+E150 = {}
+
+function E150.lcd_reg_write(reg, val)
+ ATJ.lcm.rs_command()
+ HW.YUV2RGB.FIFODATA.write(reg)
+ ATJ.lcm.rs_data()
+ HW.YUV2RGB.FIFODATA.write(val)
+end
+
+function E150.lcd_init()
+ ATJ.lcm.init()
+
+ ATJ.gpio.outen("PORTA", 16, 1)
+ ATJ.gpio.set("PORTA", 16 , 1)
+ hwstub.mdelay(10)
+ ATJ.gpio.set("PORTA", 16, 0)
+ hwstub.mdelay(10)
+ ATJ.gpio.set("PORTA", 16, 1)
+ hwstub.mdelay(10)
+
+ -- lcd controller init sequence matching HX8347-D
+ E150.lcd_reg_write(0xea, 0x00)
+ E150.lcd_reg_write(0xeb, 0x20)
+ E150.lcd_reg_write(0xec, 0x0f)
+ E150.lcd_reg_write(0xed, 0xc4)
+ E150.lcd_reg_write(0xe8, 0xc4)
+ E150.lcd_reg_write(0xe9, 0xc4)
+ E150.lcd_reg_write(0xf1, 0xc4)
+ E150.lcd_reg_write(0xf2, 0xc4)
+ E150.lcd_reg_write(0x27, 0xc4)
+ E150.lcd_reg_write(0x40, 0x00) -- gamma block start
+ E150.lcd_reg_write(0x41, 0x00)
+ E150.lcd_reg_write(0x42, 0x01)
+ E150.lcd_reg_write(0x43, 0x13)
+ E150.lcd_reg_write(0x44, 0x10)
+ E150.lcd_reg_write(0x45, 0x26)
+ E150.lcd_reg_write(0x46, 0x08)
+ E150.lcd_reg_write(0x47, 0x51)
+ E150.lcd_reg_write(0x48, 0x02)
+ E150.lcd_reg_write(0x49, 0x12)
+ E150.lcd_reg_write(0x4a, 0x18)
+ E150.lcd_reg_write(0x4b, 0x19)
+ E150.lcd_reg_write(0x4c, 0x14)
+ E150.lcd_reg_write(0x50, 0x19)
+ E150.lcd_reg_write(0x51, 0x2f)
+ E150.lcd_reg_write(0x52, 0x2c)
+ E150.lcd_reg_write(0x53, 0x3e)
+ E150.lcd_reg_write(0x54, 0x3f)
+ E150.lcd_reg_write(0x55, 0x3f)
+ E150.lcd_reg_write(0x56, 0x2e)
+ E150.lcd_reg_write(0x57, 0x77)
+ E150.lcd_reg_write(0x58, 0x0b)
+ E150.lcd_reg_write(0x59, 0x06)
+ E150.lcd_reg_write(0x5a, 0x07)
+ E150.lcd_reg_write(0x5b, 0x0d)
+ E150.lcd_reg_write(0x5c, 0x1d)
+ E150.lcd_reg_write(0x5d, 0xcc) -- gamma block end
+ E150.lcd_reg_write(0x1b, 0x1b)
+ E150.lcd_reg_write(0x1a, 0x01)
+ E150.lcd_reg_write(0x24, 0x2f)
+ E150.lcd_reg_write(0x25, 0x57)
+ E150.lcd_reg_write(0x23, 0x86)
+ E150.lcd_reg_write(0x18, 0x36) -- 70Hz framerate
+ E150.lcd_reg_write(0x19, 0x01) -- osc enable
+ E150.lcd_reg_write(0x01, 0x00)
+ E150.lcd_reg_write(0x1f, 0x88)
+ hwstub.mdelay(5)
+ E150.lcd_reg_write(0x1f, 0x80)
+ hwstub.mdelay(5)
+ E150.lcd_reg_write(0x1f, 0x90)
+ hwstub.mdelay(5)
+ E150.lcd_reg_write(0x1f, 0xd0)
+ hwstub.mdelay(5)
+ E150.lcd_reg_write(0x17, 0x05) -- 16bpp
+ E150.lcd_reg_write(0x36, 0x00)
+ E150.lcd_reg_write(0x28, 0x38)
+ hwstub.mdelay(40)
+ E150.lcd_reg_write(0x28, 0x3c)
+
+ E150.lcd_reg_write(0x02, 0x00) -- column start MSB
+ E150.lcd_reg_write(0x03, 0x00) -- column start LSB
+ E150.lcd_reg_write(0x04, 0x00) -- column end MSB
+ E150.lcd_reg_write(0x05, 0xef) -- column end LSB
+ E150.lcd_reg_write(0x06, 0x00) -- row start MSB
+ E150.lcd_reg_write(0x07, 0x00) -- row start LSB
+ E150.lcd_reg_write(0x08, 0x01) -- row end MSB
+ E150.lcd_reg_write(0x09, 0x3f) -- row end LSB
+
+ ATJ.lcm.fb_data() -- prepare for write to fifo
+
+ -- clear lcd gram
+ for y=0, 319 do
+ for x=0, 239/2 do
+ HW.YUV2RGB.FIFODATA.write(0)
+ end
+ end
+
+end
+
+function E150.set_backlight(val)
+ local fmclk = HW.CMU.FMCLK.read()
+ fmclk = bit32.band(fmclk, bit32.bnot(0x1c))
+ fmclk = bit32.bor(fmclk, 0x22)
+ HW.CMU.FMCLK.write(fmclk)
+
+ HW.PMU.CTL.write(bit32.bor(HW.PMU.CTL.read(), 0x8000))
+ local chg = HW.PMU.CHG.read()
+ chg = bit32.band(chg, bit32.bnot(0x1f00))
+ chg = bit32.bor(chg, bit32.bor(0xc000, bit32.lshift(val, 8)))
+ HW.PMU.CHG.write(chg)
+end
+
+function E150.init()
+ E150.lcd_init()
+ E150.set_backlight(24);
+end
diff --git a/utils/regtools/desc/regs-atj213x.xml b/utils/regtools/desc/regs-atj213x.xml
index 77e757d834..f43c6287bd 100644
--- a/utils/regtools/desc/regs-atj213x.xml
+++ b/utils/regtools/desc/regs-atj213x.xml
@@ -302,10 +302,70 @@
<addr name="BDAT" addr="0x14"/>
</reg>
<reg name="MFCTL0" desc="">
- <addr name="MFCTLO" addr="0x18"/>
+ <addr name="MFCTL0" addr="0x18"/>
+ <field name="RESERVED31_25" desc="" bitrange="31:25"/>
+ <field name="GPIOA2_0" desc="" bitrange="24:22">
+ <value name="NAND_CLE_RB_ALE" value="0x1" desc=""/>
+ <value name="LCD_RS_WD9_WD0" value="0x2" desc=""/>
+ <value name="SD_CMD" value="0x4" desc=""/>
+ </field>
+ <field name="CEB6" desc="" bitrange="21:20">
+ <value name="LCD_CE" value="0x2" desc=""/>
+ <value name="SD_CLK" value="0x3" desc=""/>
+ </field>
+ <field name="RESERVED19_16" desc="" bitrange="19:16"/>
+ <field name="CEB3" desc="" bitrange="15:14">
+ <value name="NAND_CEB3" value="0x1" desc=""/>
+ <value name="LCD_CE" value="0x2" desc=""/>
+ </field>
+ <field name="CEB2" desc="" bitrange="13:12">
+ <value name="NAND_CEB2" value="0x1" desc=""/>
+ <value name="LCD_CE" value="0x2" desc=""/>
+ </field>
+ <field name="CEB1" desc="" bitrange="11:10">
+ <value name="NAND_CEB1" value="0x1" desc=""/>
+ <value name="LCD_CE" value="0x2" desc=""/>
+ </field>
+ <field name="CEB0" desc="" bitrange="9:8">
+ <value name="NAND_CEB0" value="0x1" desc=""/>
+ <value name="LCD_CE" value="0x2" desc=""/>
+ </field>
+ <field name="WRRD" desc="" bitrange="7:6">
+ <value name="NAND_WR_RD" value="0x1" desc=""/>
+ <value name="LCD_WRB_RDB" value="0x2" desc=""/>
+ </field>
+ <field name="NAND_D7_0" desc="" bitrange="5:3">
+ <value name="NAND_D7_0" value="0x1" desc=""/>
+ <value name="LCD_WD17_10" value="0x2" desc=""/>
+ </field>
+ <field name="NAND_D15_8" desc="" bitrange="2:0">
+ <value name="NAND_D15_8" value="0x1" desc=""/>
+ <value name="LCD_WD8_1" value="0x2" desc=""/>
+ <value name="SDR_D7_0" value="0x4" desc=""/>
+ </field>
</reg>
<reg name="MFCTL1" desc="">
<addr name="MFCTL1" addr="0x1c"/>
+ <field name="MFEN" desc="" bitrange="31:31"/>
+ <field name="RESERVED30_18" desc="" bitrange="30:18"/>
+ <field name="SD2E" desc="" bitrange="17:17"/>
+ <field name="RBS" desc="" bitrange="16:16"/>
+ <field name="RESERVED15_12" desc="" bitrange="15:12"/>
+ <field name="SIR0" desc="" bitrange="11:11"/>
+ <field name="SPTR" desc="" bitrange="10:9">
+ <value name="I2C1_SCL_ADA" value="0x1" desc=""/>
+ <value name="UART2_TX_RX" value="0x2" desc=""/>
+ </field>
+ <field name="U2TR" desc="" bitrange="8:8">
+ <value name="UART2_TX_RX" value="0x0" desc=""/>
+ <value name="I2C2_SCL_SDA" value="0x1" desc=""/>
+ </field>
+ <field name="RESERVED7_6" desc="" bitrange="7:6"/>
+ <field name="I2C1SS" desc="" bitrange="5:4">
+ <value name="I2C1_SCL_SDA" value="0x0" desc=""/>
+ <value name="UART2_TX_RX" value="0x1" desc=""/>
+ </field>
+ <field name="RESERVED3_0" desc="" bitrange="3:0"/>
</reg>
</dev>
<dev name="I2C" long_name="" desc="" version="1.0">
generated by cgit (git 2.34.1) at 2024-04-16 19:34:13 +0000