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| author | Amaury Pouly <amaury.pouly@gmail.com> | 2012-02-28 22:45:45 +0100 |
|---|---|---|
| committer | Amaury Pouly <amaury.pouly@gmail.com> | 2012-02-28 23:57:37 +0100 |
| commit | 0d78dd170d459ca0cce6c1f107ea0a98066f3a62 (patch) | |
| tree | 7a246316ea60f7175f073a739122fed4befcb9e3 | |
| parent | c4450b9baf0b09d1da054f282603573547b7ad14 (diff) | |
| download | rockbox-0d78dd170d459ca0cce6c1f107ea0a98066f3a62.tar.gz rockbox-0d78dd170d459ca0cce6c1f107ea0a98066f3a62.zip | |
imx233: user __FIELD_SET to set the clock divisors
The clock divisors must *NEVER* be 0, first clearing then setting is thus undefined.
Change-Id: Iba8e6ba1e668bf746e3f7387f0175f63d81f6b2b
| -rw-r--r-- | firmware/target/arm/imx233/clkctrl-imx233.c | 28 |
1 files changed, 8 insertions, 20 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.c b/firmware/target/arm/imx233/clkctrl-imx233.c index 744a4b11d8..bfa707e3be 100644 --- a/firmware/target/arm/imx233/clkctrl-imx233.c +++ b/firmware/target/arm/imx233/clkctrl-imx233.c @@ -80,34 +80,22 @@ void imx233_set_clock_divisor(enum imx233_clock_t clk, int div) switch(clk) { case CLK_PIX: - HW_CLKCTRL_PIX &= ~HW_CLKCTRL_PIX__DIV_BM; - HW_CLKCTRL_PIX |= div; - while(HW_CLKCTRL_PIX & __CLK_BUSY); + __FIELD_SET(HW_CLKCTRL_PIX, DIV, div); break; case CLK_SSP: - HW_CLKCTRL_SSP &= ~HW_CLKCTRL_SSP__DIV_BM; - HW_CLKCTRL_SSP |= div; - while(HW_CLKCTRL_SSP & __CLK_BUSY); + __FIELD_SET(HW_CLKCTRL_SSP, DIV, div); break; case CLK_CPU: - __REG_CLR(HW_CLKCTRL_CPU) = HW_CLKCTRL_CPU__DIV_CPU_BM; - __REG_SET(HW_CLKCTRL_CPU) = div; - while(HW_CLKCTRL_CPU & HW_CLKCTRL_CPU__BUSY_REF_CPU); + __FIELD_SET(HW_CLKCTRL_CPU, DIV_CPU, div); break; case CLK_EMI: - HW_CLKCTRL_EMI &= ~HW_CLKCTRL_EMI__DIV_EMI_BM; - HW_CLKCTRL_EMI |= div; - while(HW_CLKCTRL_EMI & HW_CLKCTRL_EMI__BUSY_REF_EMI); + __FIELD_SET(HW_CLKCTRL_EMI, DIV_EMI, div); break; case CLK_HBUS: - __REG_CLR(HW_CLKCTRL_HBUS) = HW_CLKCTRL_HBUS__DIV_BM | HW_CLKCTRL_HBUS__DIV_FRAC_EN; - __REG_SET(HW_CLKCTRL_HBUS) = div; - while(HW_CLKCTRL_HBUS & __CLK_BUSY); + __FIELD_SET(HW_CLKCTRL_HBUS, DIV, div); break; case CLK_XBUS: - HW_CLKCTRL_XBUS &= ~HW_CLKCTRL_XBUS__DIV_BM; - HW_CLKCTRL_XBUS |= div; - while(HW_CLKCTRL_XBUS & __CLK_BUSY); + __FIELD_SET(HW_CLKCTRL_XBUS, DIV, div); break; default: return; } @@ -138,8 +126,8 @@ void imx233_set_fractional_divisor(enum imx233_clock_t clk, int fracdiv) switch(clk) { case CLK_HBUS: - __REG_CLR(HW_CLKCTRL_HBUS) = HW_CLKCTRL_HBUS__DIV_BM; - __REG_SET(HW_CLKCTRL_HBUS) = fracdiv | HW_CLKCTRL_HBUS__DIV_FRAC_EN; + __FIELD_SET(HW_CLKCTRL_HBUS, DIV, fracdiv); + __REG_SET(HW_CLKCTRL_HBUS) = HW_CLKCTRL_HBUS__DIV_FRAC_EN; return; case CLK_PIX: REG = &HW_CLKCTRL_FRAC_PIX; break; case CLK_IO: REG = &HW_CLKCTRL_FRAC_IO; break; |