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| author | Rob Purchase <shotofadds@rockbox.org> | 2009-09-01 21:35:37 +0000 |
|---|---|---|
| committer | Rob Purchase <shotofadds@rockbox.org> | 2009-09-01 21:35:37 +0000 |
| commit | 19a5dfea283c89540b61d0103ba0fe8ddee17612 (patch) | |
| tree | f958da80e4bdd29ce75efba58b5d995036f8332a | |
| parent | 166606cea08761ce3d1acf6283db97ede444bd98 (diff) | |
| download | rockbox-19a5dfea283c89540b61d0103ba0fe8ddee17612.tar.gz rockbox-19a5dfea283c89540b61d0103ba0fe8ddee17612.zip | |
D2: Enable ARM cache coherency functions (eg. during codec load), which should eliminate data aborts/freezes on track changes. NOTE: The linker script reserves space at the end of DRAM for the TTB, but this is not currently used.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22595 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | apps/plugins/plugin.lds | 4 | ||||
| -rw-r--r-- | firmware/SOURCES | 1 | ||||
| -rw-r--r-- | firmware/export/tcc780x.h | 5 | ||||
| -rw-r--r-- | firmware/target/arm/tcc780x/app.lds | 3 | ||||
| -rw-r--r-- | firmware/target/arm/tcc780x/system-target.h | 1 |
5 files changed, 13 insertions, 1 deletions
diff --git a/apps/plugins/plugin.lds b/apps/plugins/plugin.lds index 70bc3e06c4..f93d5d4425 100644 --- a/apps/plugins/plugin.lds +++ b/apps/plugins/plugin.lds @@ -61,6 +61,10 @@ OUTPUT_FORMAT(elf32-littlemips) #define TTB_SIZE (0x4000) #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE +#elif CONFIG_CPU==TCC7801 +#include "cpu.h" +#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE + #elif CONFIG_CPU==AS3525 #include "cpu.h" #define DRAMORIG DRAM_ORIG diff --git a/firmware/SOURCES b/firmware/SOURCES index ba37745aff..3a29c25d63 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES @@ -1264,6 +1264,7 @@ target/arm/tcc780x/cowond2/power-cowond2.c target/arm/tcc780x/cowond2/powermgmt-cowond2.c target/arm/tcc780x/cowond2/backlight-cowond2.c target/arm/usb-tcc.c +target/arm/mmu-arm.S #ifndef BOOTLOADER target/arm/tcc780x/timer-tcc780x.c target/arm/wmcodec-telechips.c diff --git a/firmware/export/tcc780x.h b/firmware/export/tcc780x.h index 497f1514e0..aca3bec2bd 100644 --- a/firmware/export/tcc780x.h +++ b/firmware/export/tcc780x.h @@ -21,6 +21,11 @@ #ifndef __TCC780X_H__ #define __TCC780X_H__ +#define TTB_SIZE (0x4000) +/* must be 16Kb (0x4000) aligned */ +#define TTB_BASE_ADDR (0x20000000 + (MEMORYSIZE*1024*1024) - TTB_SIZE) +#define TTB_BASE ((unsigned long *)TTB_BASE_ADDR) /* End of memory */ + /* General-purpose IO */ #define PORTCFG0 (*(volatile unsigned long *)0xF005A000) diff --git a/firmware/target/arm/tcc780x/app.lds b/firmware/target/arm/tcc780x/app.lds index d62204a9a5..a742908ce1 100644 --- a/firmware/target/arm/tcc780x/app.lds +++ b/firmware/target/arm/tcc780x/app.lds @@ -15,7 +15,8 @@ STARTUP(target/arm/tcc780x/crt0.o) #define STUBOFFSET 0 #endif -#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE +#include "cpu.h" +#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGINSIZE - CODECSIZE - TTB_SIZE #define DRAMORIG 0x20000000 + STUBOFFSET #define ITCMORIG 0x00000000 diff --git a/firmware/target/arm/tcc780x/system-target.h b/firmware/target/arm/tcc780x/system-target.h index 6e2e7be980..fe66a6eb68 100644 --- a/firmware/target/arm/tcc780x/system-target.h +++ b/firmware/target/arm/tcc780x/system-target.h @@ -22,6 +22,7 @@ #define SYSTEM_TARGET_H #include "system-arm.h" +#include "mmu-arm.h" #define CPUFREQ_DEFAULT 32000000 #define CPUFREQ_NORMAL 48000000 |