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authorWilliam Wilgus <wilgus.william@gmail.com>2021-03-25 00:32:26 -0400
committerWilliam Wilgus <wilgus.william@gmail.com>2021-03-25 00:32:26 -0400
commit3a5c5edbf6cb3ac5e4b65fe036ca50b41fabaa89 (patch)
tree5c43b87cc68ff75501ba1ca2c0ab43fd76532b4c
parenta53864ed4a7814a95fee02f4fde8fc12a4df145a (diff)
downloadrockbox-3a5c5edbf6cb3ac5e4b65fe036ca50b41fabaa89.tar.gz
rockbox-3a5c5edbf6cb3ac5e4b65fe036ca50b41fabaa89.zip
lcd framebuffer - Bugfix #2 ensure proper alignment
-- apparenty 0x4 aligned doesn't work properly requires 0x8 alignment at least for the h10 20gb but enabled for all processors that define MEM_ALIGN_ATTR Change-Id: I11edaab183b91a6d158f1f439f173b9b699dc914
-rw-r--r--firmware/export/lcd.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/firmware/export/lcd.h b/firmware/export/lcd.h
index ffaf1a63d2..c8eaf1545c 100644
--- a/firmware/export/lcd.h
+++ b/firmware/export/lcd.h
@@ -27,6 +27,7 @@
#include "cpu.h"
#include "config.h"
#include "events.h"
+#include "system.h"
/* Frame buffer stride
@@ -165,9 +166,9 @@ struct frame_buffer_t {
fb_remote_data *fb_remote_ptr;
#endif
};
- void *(*get_address_fn)(int x, int y);
ptrdiff_t stride;
size_t elems;
+ void *(*get_address_fn)(int x, int y) MEM_ALIGN_ATTR;
};
#define VP_FLAG_ALIGN_RIGHT 0x01