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| author | Jack Halpin <jack.halpin@gmail.com> | 2010-04-09 00:26:06 +0000 |
|---|---|---|
| committer | Jack Halpin <jack.halpin@gmail.com> | 2010-04-09 00:26:06 +0000 |
| commit | 43304b87b0662d1619ac60e5297a1694aa580310 (patch) | |
| tree | 396ed8105a5f44c4289d1d61beef329a1430e92b | |
| parent | cb6e120b66539d8101e9c121e237cde0318b68ea (diff) | |
| download | rockbox-43304b87b0662d1619ac60e5297a1694aa580310.tar.gz rockbox-43304b87b0662d1619ac60e5297a1694aa580310.zip | |
sd-as3525v2: Add some comments, no functional changes
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25546 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/arm/as3525/sd-as3525v2.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c index 059687acce..0a5df23e28 100644 --- a/firmware/target/arm/as3525/sd-as3525v2.c +++ b/firmware/target/arm/as3525/sd-as3525v2.c @@ -628,41 +628,41 @@ static void init_controller(void) int hcon_numcards = ((MCI_HCON>>1) & 0x1F) + 1; int card_mask = (1 << hcon_numcards) - 1; - MCI_PWREN &= ~card_mask; /* power off all cards */ + MCI_PWREN &= ~card_mask; /* power off all cards */ - MCI_CLKSRC = 0x00; /* All CLK_SRC_CRD set to 0*/ - MCI_CLKDIV = 0x00; /* CLK_DIV_0 : bits 7:0 */ + MCI_CLKSRC = 0x00; /* All CLK_SRC_CRD set to 0*/ + MCI_CLKDIV = 0x00; /* CLK_DIV_0 : bits 7:0 */ - MCI_PWREN |= card_mask; /* power up cards */ + MCI_PWREN |= card_mask; /* power up cards */ mci_delay(); MCI_CTRL |= CTRL_RESET; while(MCI_CTRL & CTRL_RESET) ; - MCI_RAW_STATUS = 0xffffffff; + MCI_RAW_STATUS = 0xffffffff; /* Clear all MCI Interrupts */ MCI_TMOUT = 0xffffffff; /* data b31:8, response b7:0 */ MCI_CTYPE = 0x0; /* all cards 1 bit bus for now */ - MCI_CLKENA = card_mask; + MCI_CLKENA = card_mask; /* Enables card clocks */ MCI_ARGUMENT = 0; MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT; while(MCI_COMMAND & CMD_DONE_BIT) ; - MCI_DEBNCE = 0xfffff; /* default value */ + MCI_DEBNCE = 0xfffff; /* default value */ /* Rx watermark = 63(sd reads) Tx watermark = 128 (sd writes) */ MCI_FIFOTH = (MCI_FIFOTH & MCI_FIFOTH_MASK) | 0x503f0080; + GPIOB_DIR |= (1<<5); /* Set pin B5 to output */ + /* Mask all MCI Interrupts initially */ MCI_MASK = 0; - GPIOB_DIR |= (1<<5); /* Pin B5 output */ - MCI_CTRL |= INT_ENABLE; } |