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| author | Aidan MacDonald <amachronic@protonmail.com> | 2022-03-16 15:35:39 +0000 |
|---|---|---|
| committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-03-24 23:40:07 +0000 |
| commit | 44fbb1a59363a464d637d93656e9b29858451550 (patch) | |
| tree | 759967e10b73d52d52be3ca156b43fa4db979ab1 | |
| parent | 90cb0b0ae541303b3efb5ddbdc2ff8adab26cb49 (diff) | |
| download | rockbox-44fbb1a593.tar.gz rockbox-44fbb1a593.zip | |
x1000: bootloader: add LCD dualboot cleanup for the M3K
Disable LCD interrupts before booting the OF - the OF kernel
hangs at boot if they are enabled.
Change-Id: I4f119818d0243953cdd620e17d9509b4fb16cc28
| -rw-r--r-- | firmware/target/mips/ingenic_x1000/boot-x1000.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/firmware/target/mips/ingenic_x1000/boot-x1000.c b/firmware/target/mips/ingenic_x1000/boot-x1000.c index feb67994b7..aa97bfcd85 100644 --- a/firmware/target/mips/ingenic_x1000/boot-x1000.c +++ b/firmware/target/mips/ingenic_x1000/boot-x1000.c @@ -145,13 +145,11 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, int length) void x1000_dualboot_cleanup(void) { -#ifdef SHANLING_Q1 - /* hack for the Q1 since OF kernels don't reset this bit, - * leading to garbled graphics. */ - if(!jz_readf(CPM_CLKGR, LCD)) { - jz_writef(LCD_CTRL, BEDN(0)); - } -#endif + /* - disable all LCD interrupts since the M3K can't cope with them + * - disable BEDN bit since it creates garbled graphics on the Q1 */ + jz_writef(CPM_CLKGR, LCD(0)); + jz_writef(LCD_CTRL, BEDN(0), EOFM(0), SOFM(0), IFUM(0), QDM(0)); + jz_writef(CPM_CLKGR, LCD(1)); /* clear USB PHY voodoo bits, not all kernels use them */ jz_writef(CPM_OPCR, GATE_USBPHY_CLK(0)); |