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author | William Wilgus <wilgus.william@gmail.com> | 2020-08-30 22:51:49 -0400 |
---|---|---|
committer | William Wilgus <me.theuser@yahoo.com> | 2020-08-31 03:07:17 +0000 |
commit | 63e6aec260f97f0f7c91c7abebecb3d4b2759f4c (patch) | |
tree | 04c88c46e574959e6ddbdb6cf24a3b9b220c31fa | |
parent | 748133cf9d7d6cf1f79f0f9ce13a9f327dd7a09f (diff) | |
download | rockbox-63e6aec.tar.gz rockbox-63e6aec.zip |
xduooX3 debug menu add GPIO IO Ports
Change-Id: I6ca9f005e412240235354b9369bcc3f4a4ad256f
-rw-r--r-- | apps/debug_menu.c | 2 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/debug-jz4760.c | 83 |
2 files changed, 84 insertions, 1 deletions
diff --git a/apps/debug_menu.c b/apps/debug_menu.c index e75fce6d32..3df7e97bce 100644 --- a/apps/debug_menu.c +++ b/apps/debug_menu.c @@ -2493,7 +2493,7 @@ static const struct { #if defined(CPU_COLDFIRE) || defined(CPU_PP) \ || CONFIG_CPU == S3C2440 || CONFIG_CPU == IMX31L || CONFIG_CPU == AS3525 \ || CONFIG_CPU == DM320 || defined(CPU_S5L870X) || CONFIG_CPU == AS3525v2 \ - || CONFIG_CPU == RK27XX + || CONFIG_CPU == RK27XX || CONFIG_CPU == JZ4760B { "View I/O ports", dbg_ports }, #endif #if (CONFIG_RTC == RTC_PCF50605) && (CONFIG_PLATFORM & PLATFORM_NATIVE) diff --git a/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c b/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c index be921efa13..0d3fec99aa 100644 --- a/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c @@ -28,6 +28,7 @@ #include "font.h" #include "button.h" #include "timefuncs.h" +#include "action.h" #ifndef BOOTLOADER @@ -39,6 +40,42 @@ static int line = 0; #define TO_MHZ(x) ((x)/1000000), ((x)%1000000)/10000 #define TO_KHZ(x) ((x)/1000), ((x)%1000)/10 +#define DEBUG_CANCEL ACTION_STD_CANCEL +#define DEBUG_NEXT ACTION_STD_NEXT +#define DEBUG_LEFT_JUSTIFY ACTION_STD_OK +#define DEBUG_LEFT_SCROLL ACTION_STD_MENU + +/* if the possiblity exists to divide by zero protect with this macro */ +#define DIV_FINITE(dividend, divisor) ((divisor == 0)? divisor : dividend/divisor) + +#define ON "Enabled" +#define OFF "Disabled" + +static bool dbg_btn(bool *done, int *x) +{ + bool cont = !*done; + if (cont) + { + lcd_update(); + int button = get_action(CONTEXT_STD,HZ/10); + switch(button) + { + case DEBUG_CANCEL: + *done = true; + case DEBUG_NEXT: + cont = false; + case DEBUG_LEFT_JUSTIFY: + (*x) = 0; + sleep(HZ/5); + break; + case DEBUG_LEFT_SCROLL: + (*x)--; + } + } + lcd_clear_display(); + return cont; +} + static void display_clocks(void) { unsigned int cppcr0 = REG_CPM_CPPCR0; /* PLL Control Register */ @@ -137,6 +174,52 @@ static void display_enabled_clocks(void) bool dbg_ports(void) { +#if CONFIG_CPU == JZ4760B + int line, i, j, cur; + int x = 0; + const int last_port = 5; + bool done = false; + + long data, dir; + long fun, intr; + long lvl; + + + lcd_clear_display(); + lcd_setfont(FONT_SYSFIXED); + + while(!done) + { + i = 0; + while(dbg_btn(&done, &x)) + { + i %= last_port; /*PORT: A B C D E F */ + while(dbg_btn(&done, &x)) + { + line = 0; + lcd_puts(x, line++, "[GPIO Vals and Dirs]"); + for (j = i; j < i + 2; j++) + { + cur = j % last_port; + dir = REG_GPIO_PXDIR(cur); + data = REG_GPIO_PXDAT(cur); + fun = REG_GPIO_PXFUN(cur); + intr = REG_GPIO_PXIM(cur); + lvl = REG_GPIO_PXPIN(cur); + + lcd_putsf(x, line++, "[%s%c]: %8x", "GPIO", 'A' + cur, lvl); + lcd_putsf(x, line++, "DIR: %8x FUN: %8x", dir, fun); + lcd_putsf(x, line++, "DAT: %8x INT: %8x", data, intr); + line++; + } + } + i++; + } + + } + lcd_setfont(FONT_UI); +#endif + return false; } |