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author | Aidan MacDonald <amachronic@protonmail.com> | 2022-12-03 11:41:46 +0000 |
---|---|---|
committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-12-18 22:14:22 +0000 |
commit | 68af18a56f343525e92df6e5425a1f1ca39fd576 (patch) | |
tree | 544c66ef87d36f4d65c6bcdae14f1c73447096df | |
parent | d6744c92b10ab7c4d217f5b11ac48dff6a8542fe (diff) | |
download | rockbox-68af18a56f.tar.gz rockbox-68af18a56f.zip |
x1000: Simplify app linker script
Get the linker to automatically assign load addresses for
the .iram and .tcsm sections. Taken from the i.MX31 linker
script.
Change-Id: Ic03d577d8690c777726daf373a3289316639bfb9
-rw-r--r-- | firmware/target/mips/ingenic_x1000/app.lds | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/firmware/target/mips/ingenic_x1000/app.lds b/firmware/target/mips/ingenic_x1000/app.lds index ead88565c4..5b43f9576e 100644 --- a/firmware/target/mips/ingenic_x1000/app.lds +++ b/firmware/target/mips/ingenic_x1000/app.lds @@ -51,7 +51,13 @@ SECTIONS *(.sdata*); } > DRAM - .iram X1000_IRAM_BASE: AT (_bssbegin) + /* + * The following sections are loaded after normal DRAM sections + * but are copied elsewhere by the startup code. + */ + _noloaddram = .; + + .iram : { _iramstart = .; . = 0x000; /* TLB refill */ @@ -68,17 +74,19 @@ SECTIONS *(.irodata); *(.idata); _iramend = .; - } > IRAM + } > IRAM AT> DRAM _iramcopy = LOADADDR(.iram); - .tcsm X1000_TCSM_BASE: AT (_bssbegin + SIZEOF(.iram)) + .tcsm : { _tcsmstart = .; KEEP(*(.tcsm*)); _tcsmend = .; - } > TCSM + } > TCSM AT> DRAM _tcsmcopy = LOADADDR(.tcsm); + /* Sections below have no data. */ + . = ALIGN(4); .stack (NOLOAD) : { @@ -91,7 +99,7 @@ SECTIONS _irqstackend = .; } > IRAM - .bss (NOLOAD) : + .bss _noloaddram (NOLOAD) : { _bssbegin = .; *(.sbss*); |