summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRafaël Carré <rafael.carre@gmail.com>2011-12-31 16:17:06 +0000
committerRafaël Carré <rafael.carre@gmail.com>2011-12-31 16:17:06 +0000
commit6fdc91e64f18ab57010198520b5031ce4f83565a (patch)
tree05a89c74554f4b508526c4b19ed7d27d9ef458cc
parent249218a5c2133d4520c23ebfa541cd2f2310cf8f (diff)
downloadrockbox-6fdc91e64f18ab57010198520b5031ce4f83565a.tar.gz
rockbox-6fdc91e64f18ab57010198520b5031ce4f83565a.tar.bz2
rockbox-6fdc91e64f18ab57010198520b5031ce4f83565a.zip
usb-s3c6400x: move usb_init_device
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31478 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/s5l8700/usb-nano2g-6g.c37
-rw-r--r--firmware/target/arm/usb-s3c6400x.c44
2 files changed, 40 insertions, 41 deletions
diff --git a/firmware/target/arm/s5l8700/usb-nano2g-6g.c b/firmware/target/arm/s5l8700/usb-nano2g-6g.c
index 7f5d38a5ae..b070f2be3b 100644
--- a/firmware/target/arm/s5l8700/usb-nano2g-6g.c
+++ b/firmware/target/arm/s5l8700/usb-nano2g-6g.c
@@ -21,9 +21,12 @@
#include "config.h"
#include "usb.h"
+#include "usb-s3c6400x.h"
+#include "cpu.h"
#ifdef HAVE_USBSTACK
#include "usb_core.h"
+#include "usb_drv.h"
#include "power.h"
void usb_enable(bool on)
@@ -38,6 +41,24 @@ int usb_detect(void)
return USB_INSERTED;
return USB_EXTRACTED;
}
+
+void usb_init_device(void)
+{
+ /* Power up the core clocks to allow writing
+ to some registers needed to power it down */
+ PCGCCTL = 0;
+#if CONFIG_CPU==S5L8701
+ PWRCON &= ~0x4000;
+ PWRCONEXT &= ~0x800;
+ INTMSK |= INTMSK_USB_OTG;
+#elif CONFIG_CPU==S5L8702
+ PWRCON(0) &= ~0x4;
+ PWRCON(1) &= ~0x8;
+ VIC0INTENABLE |= 1 << 19;
+#endif
+
+ usb_drv_exit();
+}
#else
void usb_enable(bool on)
{
@@ -48,4 +69,20 @@ int usb_detect(void)
{
return USB_EXTRACTED;
}
+
+void usb_init_device(void)
+{
+ DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
+
+ ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */
+ PCGCCTL = 1; /* Shut down PHY clock */
+ OPHYPWR = 0xF; /* PHY: Power down */
+
+#if CONFIG_CPU==S5L8701
+ PWRCON |= 0x4000;
+ PWRCONEXT |= 0x800;
+#elif CONFIG_CPU==S5L8702
+ PWRCON(0) |= 0x4;
+ PWRCON(1) |= 0x8;
+#endif
#endif
diff --git a/firmware/target/arm/usb-s3c6400x.c b/firmware/target/arm/usb-s3c6400x.c
index cf346f1de1..09b133d1a1 100644
--- a/firmware/target/arm/usb-s3c6400x.c
+++ b/firmware/target/arm/usb-s3c6400x.c
@@ -31,7 +31,6 @@
#include "usb-s3c6400x.h"
-#ifdef HAVE_USBSTACK
#include "usb_ch9.h"
#include "usb_core.h"
#include <inttypes.h>
@@ -334,6 +333,9 @@ void usb_drv_stall(int endpoint, bool stall, bool in)
void usb_drv_init(void)
{
+ for (unsigned i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
+ semaphore_init(&endpoints[i].complete, 1, 0);
+
/* Enable USB clock */
#if CONFIG_CPU==S5L8701
PWRCON &= ~0x4000;
@@ -369,47 +371,7 @@ void usb_drv_exit(void)
#endif
}
-void usb_init_device(void)
-{
- for (unsigned i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++)
- semaphore_init(&endpoints[i].complete, 1, 0);
-
- /* Power up the core clocks to allow writing
- to some registers needed to power it down */
- PCGCCTL = 0;
-#if CONFIG_CPU==S5L8701
- PWRCON &= ~0x4000;
- PWRCONEXT &= ~0x800;
- INTMSK |= INTMSK_USB_OTG;
-#elif CONFIG_CPU==S5L8702
- PWRCON(0) &= ~0x4;
- PWRCON(1) &= ~0x8;
- VIC0INTENABLE |= 1 << 19;
-#endif
-
- usb_drv_exit();
-}
-
void usb_attach(void)
{
usb_enable(true);
}
-
-#else
-void usb_init_device(void)
-{
- DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
-
- ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */
- PCGCCTL = 1; /* Shut down PHY clock */
- OPHYPWR = 0xF; /* PHY: Power down */
-
-#if CONFIG_CPU==S5L8701
- PWRCON |= 0x4000;
- PWRCONEXT |= 0x800;
-#elif CONFIG_CPU==S5L8702
- PWRCON(0) |= 0x4;
- PWRCON(1) |= 0x8;
-#endif
-}
-#endif