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authorMarcin Bukat <marcin.bukat@gmail.com>2017-09-15 21:38:57 +0200
committerMarcin Bukat <marcin.bukat@gmail.com>2017-09-15 21:44:59 +0200
commit8b744571c0fa6a2805334a1de6f139db6c119393 (patch)
tree44a5a0ba3e39404e38bb380266e59ff8a48122bf
parentc6d5cd74a866901eb8f6e69e642f617e5810e0c6 (diff)
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ATJ hwstub: Add cache coherency
All the hard work was done by pamaury. I simply added proper defines. Change-Id: Ib374eea7cd20f35518ad8a68d771c57c54ae01ca
-rw-r--r--utils/hwstub/stub/atj213x/target-config.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/utils/hwstub/stub/atj213x/target-config.h b/utils/hwstub/stub/atj213x/target-config.h
index 081cccc581..5d489044ca 100644
--- a/utils/hwstub/stub/atj213x/target-config.h
+++ b/utils/hwstub/stub/atj213x/target-config.h
@@ -3,6 +3,13 @@
#define IRAM_SIZE 0x18000
#define DRAM_ORIG 0x80000000 /* KSEG1 cached unmapped */
#define DRAM_SIZE 0x800000
+#define DCACHE_SIZE 0x4000 /* 16 kB */
+#define DCACHE_LINE_SIZE 0x10 /* 16 B */
+#define ICACHE_SIZE 0x4000 /* 16 kB */
+#define ICACHE_LINE_SIZE 0x10 /* 61 B */
+/* we need to flush caches before executing */
+#define CONFIG_FLUSH_CACHES
+
#define CPU_MIPS
/* something provides define