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author | Solomon Peachy <pizza@shaftnet.org> | 2024-07-16 17:34:26 -0400 |
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committer | Solomon Peachy <pizza@shaftnet.org> | 2024-07-16 17:35:53 -0400 |
commit | 942e013eac7859ee1cf823e7b98af163c79b54d5 (patch) | |
tree | 977a9d5f37f22f720f644f07ef52db483e15e61a | |
parent | 27a0cda6ac36f9be7309e4b963d5383299651c23 (diff) | |
download | rockbox-942e013eac.tar.gz rockbox-942e013eac.zip |
pp5020: Cache the result of the is_ssd check.
...So we don't look it up on every write.
Change-Id: I85b0abe5032a60588535b401cc719661601807ee
-rw-r--r-- | firmware/target/arm/pp/ata-pp5020.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/firmware/target/arm/pp/ata-pp5020.c b/firmware/target/arm/pp/ata-pp5020.c index 396e684019..7351215693 100644 --- a/firmware/target/arm/pp/ata-pp5020.c +++ b/firmware/target/arm/pp/ata-pp5020.c @@ -106,6 +106,8 @@ static bool dma_boosted = false; static bool dma_needs_boost; #endif +static int ata_is_ssd = 0; + /* This function sets up registers for 80 Mhz. Ultra DMA mode 2 works at 30 Mhz. */ @@ -133,6 +135,8 @@ void ata_dma_set_mode(unsigned char mode) { #if !defined(IPOD_NANO) IDE0_CFG |= 0x20000000; /* >= 50 Mhz */ #endif + + ata_is_ssd = ata_disk_isssd(); } #define IDE_CFG_INTRQ 8 @@ -175,7 +179,7 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write) { if (write) { if ((unsigned long)addr & 3) return false; - if (!ata_disk_isssd()) + if (!ata_is_ssd) return false; } |