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authorJens Arnold <amiconn@rockbox.org>2007-10-15 21:16:50 +0000
committerJens Arnold <amiconn@rockbox.org>2007-10-15 21:16:50 +0000
commitb85b6be3aa05510a1aca173a6f5a762c4448fdae (patch)
tree7d6b3571c1f0572c4ae6e99fce885493b5664e37
parentc08c081211d1eba8115569af9eaeae60e7cf4a9b (diff)
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Coldfire targets: enable buffered writes by default. Speeds up all sorts of I/O that writes to ports: LCD update (except the functions using DMA on H300), ATA writes, .... Some timings had to be adjusted for the new configuration.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15129 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/coldfire/crt0.S4
-rw-r--r--firmware/target/coldfire/iaudio/m5/lcd-as-m5.S6
-rw-r--r--firmware/target/coldfire/iaudio/system-iaudio.c2
-rw-r--r--firmware/target/coldfire/iriver/h100/adc-h100.c4
-rw-r--r--firmware/target/coldfire/iriver/h100/lcd-as-h100.S12
-rw-r--r--firmware/target/coldfire/pcf50606-coldfire.c2
-rw-r--r--firmware/target/coldfire/system-target.h2
7 files changed, 16 insertions, 16 deletions
diff --git a/firmware/target/coldfire/crt0.S b/firmware/target/coldfire/crt0.S
index 215ccfe432..1393bc8bbd 100644
--- a/firmware/target/coldfire/crt0.S
+++ b/firmware/target/coldfire/crt0.S
@@ -218,8 +218,8 @@ start:
move.l #0x01000000,%d0
movec.l %d0,%cacr
- /* Enable cache, default=non-cacheable,no buffered writes */
- move.l #0x80000000,%d0
+ /* Enable cache, default=non-cacheable, buffered writes */
+ move.l #0x80000100,%d0
movec.l %d0,%cacr
/* Cache enabled in SDRAM only, buffered writes enabled */
diff --git a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
index c973dc2c40..4a88dc92b0 100644
--- a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
+++ b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
@@ -70,13 +70,13 @@ lcd_write_data:
lea 0xf0008002, %a1
.loop:
- /* When running in IRAM, this loop takes 7 cycles plus the LCD write.
- The 7 cycles are necessary to follow the LCD timing specs
+ /* When running in IRAM, this loop takes 10 cycles plus the LCD write.
+ The 10 cycles are necessary to follow the LCD timing specs
at 140MHz */
+ nop /* 3(0/0) */
move.b (%a0)+, %d1 /* 3(1/0) */
move.w %d1, (%a1) /* 1(0/1) */
subq.l #1, %d0 /* 1(0/0) */
- nop /* 1(0/0) */
bne .loop /* 2(0/0) */
rts
.wd_end:
diff --git a/firmware/target/coldfire/iaudio/system-iaudio.c b/firmware/target/coldfire/iaudio/system-iaudio.c
index 4e32d360fa..c04d4ffc2d 100644
--- a/firmware/target/coldfire/iaudio/system-iaudio.c
+++ b/firmware/target/coldfire/iaudio/system-iaudio.c
@@ -71,7 +71,7 @@ void cf_set_cpu_frequency(long frequency)
RECALC_DELAYS(CPUFREQ_MAX);
PLLCR = 0x0102c049 | (PLLCR & 0x70C00000);
CSCR0 = 0x00001180; /* Flash: 4 wait states */
- CSCR1 = 0x00000980; /* LCD: 2 wait states */
+ CSCR1 = 0x00001180; /* LCD: 4 wait states */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
This may take up to 10ms! */
timers_adjust_prescale(CPUFREQ_MAX_MULT, true);
diff --git a/firmware/target/coldfire/iriver/h100/adc-h100.c b/firmware/target/coldfire/iriver/h100/adc-h100.c
index b69204aa02..0c14d7b338 100644
--- a/firmware/target/coldfire/iriver/h100/adc-h100.c
+++ b/firmware/target/coldfire/iriver/h100/adc-h100.c
@@ -37,7 +37,7 @@
({ \
int _x_; \
asm volatile ( \
- "move.l #11, %[_x_] \r\n" \
+ "move.l #13, %[_x_] \r\n" \
"1: \r\n" \
"subq.l #1, %[_x_] \r\n" \
"bhi.b 1b \r\n" \
@@ -94,7 +94,7 @@ unsigned short adc_scan(int channel)
data <<= 1;
data |= DO?1:0;
}
-
+
CS_HI;
set_irq_level(level);
diff --git a/firmware/target/coldfire/iriver/h100/lcd-as-h100.S b/firmware/target/coldfire/iriver/h100/lcd-as-h100.S
index 1605b210c1..c7509871fc 100644
--- a/firmware/target/coldfire/iriver/h100/lcd-as-h100.S
+++ b/firmware/target/coldfire/iriver/h100/lcd-as-h100.S
@@ -29,8 +29,8 @@
lcd_write_command:
move.l (4,%sp),%d0
- lea MBAR2,%a1
- move.l #~8,%d1
+ lea MBAR2,%a1
+ move.l #~8,%d1
and.l %d1,(0xb4,%a1)
move.w %d0,0xf0000000
rts
@@ -77,19 +77,19 @@ lcd_write_command_ex:
lcd_write_data:
move.l (4,%sp),%a0 /* Data pointer */
move.l (8,%sp),%d0 /* Length */
- lea MBAR2,%a1
+ lea MBAR2,%a1
moveq #8,%d1
or.l %d1,(0xb4,%a1)
lea 0xf0000000,%a1
.loop:
- /* When running in IRAM, this loop takes 7 cycles plus the LCD write.
- The 7 cycles are necessary to follow the LCD timing specs
+ /* When running in IRAM, this loop takes 10 cycles plus the LCD write.
+ The 10 cycles are necessary to follow the LCD timing specs
at 140MHz */
+ nop /* 3(0/0) */
move.b (%a0)+,%d1 /* 3(1/0) */
move.w %d1,(%a1) /* 1(0/1) */
subq.l #1,%d0 /* 1(0/0) */
- nop /* 1(0/0) */
bne .loop /* 2(0/0) */
rts
.wd_end:
diff --git a/firmware/target/coldfire/pcf50606-coldfire.c b/firmware/target/coldfire/pcf50606-coldfire.c
index d57b249f0d..3c1f402791 100644
--- a/firmware/target/coldfire/pcf50606-coldfire.c
+++ b/firmware/target/coldfire/pcf50606-coldfire.c
@@ -81,7 +81,7 @@ static int i2c_delay IDATA_ATTR = 44;
void pcf50606_i2c_recalc_delay(int cpu_clock)
{
- i2c_delay = MAX(cpu_clock / (400000*2*3) - 7, 1);
+ i2c_delay = MAX(cpu_clock / (400000*2*3) - 5, 1);
}
inline void pcf50606_i2c_start(void)
diff --git a/firmware/target/coldfire/system-target.h b/firmware/target/coldfire/system-target.h
index 8e3a2a3d5a..706ecf6150 100644
--- a/firmware/target/coldfire/system-target.h
+++ b/firmware/target/coldfire/system-target.h
@@ -155,7 +155,7 @@ static inline void invalidate_icache(void)
{
asm volatile ("move.l #0x01000000,%d0\n"
"movec.l %d0,%cacr\n"
- "move.l #0x80000000,%d0\n"
+ "move.l #0x80000100,%d0\n"
"movec.l %d0,%cacr");
}