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| author | Solomon Peachy <pizza@shaftnet.org> | 2020-10-03 15:57:38 -0400 |
|---|---|---|
| committer | Solomon Peachy <pizza@shaftnet.org> | 2020-10-03 15:57:38 -0400 |
| commit | d5167b1221bb89c0241fa9f435a676d5a475e585 (patch) | |
| tree | 3199d865c1ea2e0fddab0fbf519905f07410cb38 | |
| parent | 2b358ffa7f65d3e67ae58a2f076477dae5bf67d5 (diff) | |
| download | rockbox-d5167b1221bb89c0241fa9f435a676d5a475e585.tar.gz rockbox-d5167b1221bb89c0241fa9f435a676d5a475e585.zip | |
coldfire: Allow building when 88KHz audio is disabled
Change-Id: Ieeacf591ad4233428dca99c347043e61abae1d1f
| -rw-r--r-- | firmware/drivers/audio/uda1380.c | 6 | ||||
| -rw-r--r-- | firmware/target/coldfire/pcm-coldfire.c | 2 |
2 files changed, 5 insertions, 3 deletions
diff --git a/firmware/drivers/audio/uda1380.c b/firmware/drivers/audio/uda1380.c index 156eb822b6..079175d966 100644 --- a/firmware/drivers/audio/uda1380.c +++ b/firmware/drivers/audio/uda1380.c @@ -227,11 +227,11 @@ void audiohw_set_frequency(int fsel) MIX_CTL_SEL_NS, WSPLL_25_50 | SYSCLK_256FS }, - [HW_FREQ_88] = + HW_HAVE_88_([HW_FREQ_88] = { MIX_CTL_SEL_NS, WSPLL_50_100 | SYSCLK_256FS - }, + },) }; const unsigned short *ent; @@ -243,6 +243,7 @@ void audiohw_set_frequency(int fsel) #ifdef USE_WSPLL /* Enable WSPLL if needed (for Iriver H100 and H300 series) */ +HW_HAVE_88_( if (fsel == HW_FREQ_88) { /* Only at this case we need use WSPLL on DAC part for Iriver H100 and H300 series, because Coldfire work @@ -251,6 +252,7 @@ void audiohw_set_frequency(int fsel) if (!wspll_enable) wspll_on(true); } else +) { /* At this case WSPLL clock and SYSCLK has same value and we don't use WSPLL to avoid WSPLL errors */ if (wspll_enable) wspll_on(false); diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c index 2e2312f7ae..5a5d2d2350 100644 --- a/firmware/target/coldfire/pcm-coldfire.c +++ b/firmware/target/coldfire/pcm-coldfire.c @@ -77,7 +77,7 @@ #if CONFIG_CPU == MCF5249 && defined(HAVE_UDA1380) static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = { - [HW_FREQ_88] = { 0x0c, 0x01 }, +HW_HAVE_88_([HW_FREQ_88] = { 0x0c, 0x01 },) [HW_FREQ_44] = { 0x06, 0x01 }, [HW_FREQ_22] = { 0x04, 0x02 }, [HW_FREQ_11] = { 0x02, 0x02 }, |