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authorAidan MacDonald <amachronic@protonmail.com>2021-03-04 00:53:16 +0000
committerSolomon Peachy <pizza@shaftnet.org>2021-03-04 02:47:13 +0000
commitde53965e3f83d5741f96a389b039b046f2f01aac (patch)
treee9f30ce0fd96aa4f89145b941b8c54399f543978
parentb82298ae2c3ba62dbb4347054fe478992df4021c (diff)
downloadrockbox-de53965e3f.tar.gz
rockbox-de53965e3f.zip
Third try fixing MIPS cache code
Changing this to be a pure discard operation after discussion on IRC Change-Id: I62955ae7975fdbbfd9eef376476042a36fe3d95a
-rw-r--r--firmware/target/mips/mmu-mips.c15
1 files changed, 1 insertions, 14 deletions
diff --git a/firmware/target/mips/mmu-mips.c b/firmware/target/mips/mmu-mips.c
index 46094bf6b6..35c47207dd 100644
--- a/firmware/target/mips/mmu-mips.c
+++ b/firmware/target/mips/mmu-mips.c
@@ -222,20 +222,7 @@ void discard_dcache_range(const void *base, unsigned int size)
char *ptr = CACHEALIGN_DOWN((char*)base);
char *end = CACHEALIGN_UP((char*)base + size);
- if(ptr != base) {
- /* Start of region not cache aligned */
- __CACHE_OP(DCHitWBInv, ptr);
- ptr += CACHEALIGN_SIZE;
- }
-
- if(base+size != end) {
- /* End of region not cache aligned */
- end -= CACHEALIGN_SIZE;
- __CACHE_OP(DCHitWBInv, end);
- }
-
- /* Interior of region is safe to discard */
- for(; ptr <= end; ptr += CACHEALIGN_SIZE)
+ for(; ptr != end; ptr += CACHEALIGN_SIZE)
__CACHE_OP(DCHitInv, ptr);
SYNC_WB();