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authorCástor Muñoz <cmvidal@gmail.com>2014-11-10 01:50:19 +0100
committerMarcin Bukat <marcin.bukat@gmail.com>2014-11-13 23:00:33 +0100
commitedb0c6c92f40db70be778bf9162ff116f5f01e31 (patch)
tree3bd981c07eb9f6c549fe4319f0f31a424b8741e4
parentbcca1114383c2147e60e73825ec68403c90bea40 (diff)
downloadrockbox-edb0c6c.tar.gz
rockbox-edb0c6c.zip
iPod Classic: fix s5l8702 cache line length.
Use 32 bytes for cache line length (arm926ej-s), this prevents misalignments of ATA storage buffer which in some builds could cause weird faults. Change-Id: I88dc595d251315620ec49b0251ddc039ff47181e Reviewed-on: http://gerrit.rockbox.org/1031 Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
-rw-r--r--firmware/export/s5l8702.h2
-rw-r--r--firmware/target/arm/s5l8702/debug-s5l8702.c5
-rw-r--r--[-rwxr-xr-x]firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c6
3 files changed, 9 insertions, 4 deletions
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
index b7da971b49..8e1d827f54 100644
--- a/firmware/export/s5l8702.h
+++ b/firmware/export/s5l8702.h
@@ -30,7 +30,7 @@
#define TIMER_FREQ 54000000
-#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
+#define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */
#define DRAM_ORIG 0x08000000
#define IRAM_ORIG 0
diff --git a/firmware/target/arm/s5l8702/debug-s5l8702.c b/firmware/target/arm/s5l8702/debug-s5l8702.c
index 27d1ccb7b8..66bfa36a93 100644
--- a/firmware/target/arm/s5l8702/debug-s5l8702.c
+++ b/firmware/target/arm/s5l8702/debug-s5l8702.c
@@ -61,6 +61,11 @@ bool dbg_hw_info(void)
_DEBUG_PRINTF("speed: %d MHz", ((CLKCON0 & 1) ?
CPUFREQ_NORMAL : CPUFREQ_MAX) / 1000000);
_DEBUG_PRINTF("current_tick: %d", (unsigned int)current_tick);
+ uint32_t __res;
+ asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r"(__res));
+ _DEBUG_PRINTF("ID code: %08x", __res);
+ asm volatile ("mrc p15, 0, %0, c0, c0, 1" : "=r"(__res));
+ _DEBUG_PRINTF("cache type: %08x", __res);
line++;
_DEBUG_PRINTF("LCD type: %d", lcd_type);
diff --git a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
index 38f9758c14..58060403d5 100755..100644
--- a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
+++ b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
@@ -48,8 +48,8 @@
/** static, private data **/
-static uint8_t ceata_taskfile[16] __attribute__((aligned(16)));
-static uint16_t ata_identify_data[0x100] __attribute__((aligned(16)));
+static uint8_t ceata_taskfile[16] STORAGE_ALIGN_ATTR;
+static uint16_t ata_identify_data[0x100] STORAGE_ALIGN_ATTR;
static bool ceata;
static bool ata_swap;
static bool ata_lba48;
@@ -68,7 +68,7 @@ static struct semaphore mmc_wakeup;
static struct semaphore mmc_comp_wakeup;
static int spinup_time = 0;
static int dma_mode = 0;
-static char aligned_buffer[SECTOR_SIZE] __attribute__((aligned(0x10)));
+static char aligned_buffer[SECTOR_SIZE] STORAGE_ALIGN_ATTR;
#ifdef ATA_HAVE_BBT