iPod Nano 2G: use the new USB DesignWare driver

Change-Id: I8d1561bf4e239b55617a8d5075457a668e0c312c

5 files changed, 163 insertions, 122 deletions

diff --git a/firmware/SOURCES b/firmware/SOURCES
index 2550475e15..53c44c89b2 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -1582,7 +1582,7 @@ target/arm/s5l8700/ipodnano2g/ftl-nano2g.c
 target/arm/s5l8700/ipodnano2g/nand-nano2g.c
 target/arm/s5l8700/ipodnano2g/pmu-nano2g.c
 target/arm/s5l8700/ipodnano2g/rtc-nano2g.c
-target/arm/s5l8700/usb-nano2g-6g.c
+target/arm/s5l8700/usb-s5l8701.c
 #ifdef HAVE_SERIAL
 target/arm/uc870x.c
 target/arm/s5l8700/uart-s5l8701.c
diff --git a/firmware/export/config/ipodnano2g.h b/firmware/export/config/ipodnano2g.h
index 8e8f40f56c..aeff6aeda1 100644
--- a/firmware/export/config/ipodnano2g.h
+++ b/firmware/export/config/ipodnano2g.h
@@ -221,12 +221,15 @@
 #define DEFAULT_BRIGHTNESS_SETTING  0x20
 
 /* USB defines */
+#define CONFIG_USBOTG USBOTG_DESIGNWARE
+#define USB_DW_CLOCK 0
+#define USB_DW_TURNAROUND 5
+/* logf() over USB serial (http://www.rockbox.org/wiki/PortalPlayerUsb) */
+//#define USB_ENABLE_SERIAL
 #define HAVE_USBSTACK
 #define HAVE_USB_HID_MOUSE
-#define CONFIG_USBOTG USBOTG_S3C6400X
 #define USB_VENDOR_ID 0x05AC
 #define USB_PRODUCT_ID 0x1260
-#define USB_NUM_ENDPOINTS 6
 #define USB_DEVBSS_ATTR __attribute__((aligned(16)))
 
 /* Define this if you can switch on/off the accessory power supply */
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h
index 3444919bc3..b559992c6a 100644
--- a/firmware/export/s5l8700.h
+++ b/firmware/export/s5l8700.h
@@ -788,7 +788,24 @@
 /* Synopsys OTG - S5L8701 only */
 #define OTGBASE 0x38800000
 #define PHYBASE 0x3C400000
-#define SYNOPSYSOTG_CLOCK 0
-#define SYNOPSYSOTG_AHBCFG (GAHBCFG_dma_enable | (GAHBCFG_INT_DMA_BURST_INCR4 << GAHBCFG_hburstlen_bitp) | GAHBCFG_glblintrmsk)
+
+/* OTG PHY control registers */
+#define OPHYPWR     (*((uint32_t volatile*)(PHYBASE + 0x000)))
+#define OPHYCLK     (*((uint32_t volatile*)(PHYBASE + 0x004)))
+#define ORSTCON     (*((uint32_t volatile*)(PHYBASE + 0x008)))
+#define OPHYUNK3    (*((uint32_t volatile*)(PHYBASE + 0x018)))
+#define OPHYUNK1    (*((uint32_t volatile*)(PHYBASE + 0x01c)))
+#define OPHYUNK2    (*((uint32_t volatile*)(PHYBASE + 0x044)))
+
+/* 7 available EPs (0b00000000011101010000000001101011), 6 used */
+#define USB_NUM_ENDPOINTS 6
+
+/* Define this if the DWC implemented on this SoC does not support
+   dedicated FIFOs. */
+#define USB_DW_SHARED_FIFO
+
+/* Define this if the DWC implemented on this SoC does not support
+   DMA or you want to disable it. */
+// #define USB_DW_ARCH_SLAVE
 
 #endif /* CONFIG_CPU==S5L8701 */
diff --git a/firmware/target/arm/s5l8700/usb-nano2g-6g.c b/firmware/target/arm/s5l8700/usb-nano2g-6g.c
deleted file mode 100644
index 6ae9f9b96b..0000000000
--- a/firmware/target/arm/s5l8700/usb-nano2g-6g.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/***************************************************************************
- *             __________               __   ___.
- *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
- *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
- *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
- *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
- *                     \/            \/     \/    \/            \/
- * $Id$
- *
- * Copyright (C) 2009 by Michael Sparmann
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
- * KIND, either express or implied.
- *
- ****************************************************************************/
-
-#include "config.h"
-#include "usb.h"
-#include "usb-s3c6400x.h"
-#include "cpu.h"
-
-#ifdef HAVE_USBSTACK
-#include "usb_core.h"
-#include "usb_drv.h"
-
-void usb_enable(bool on)
-{
-    if (on) usb_core_init();
-    else usb_core_exit();
-}
-
-#if CONFIG_CPU==S5L8701
-#include "power.h"
-
-int usb_detect(void)
-{
-    if (power_input_status() & POWER_INPUT_USB)
-        return USB_INSERTED;
-    return USB_EXTRACTED;
-}
-
-#elif CONFIG_CPU==S5L8702
-static int usb_status = USB_EXTRACTED;
-
-int usb_detect(void)
-{
-    return usb_status;
-}
-
-void usb_insert_int(void)
-{
-    usb_status = USB_INSERTED;
-#ifdef USB_STATUS_BY_EVENT
-    usb_status_event(USB_INSERTED);
-#endif
-}
-
-void usb_remove_int(void)
-{
-    usb_status = USB_EXTRACTED;
-#ifdef USB_STATUS_BY_EVENT
-    usb_status_event(USB_EXTRACTED);
-#endif
-}
-#endif /* S5L8702 */
-
-void usb_init_device(void)
-{
-    /* Power up the core clocks to allow writing
-       to some registers needed to power it down */
-    PCGCCTL = 0;
-#if CONFIG_CPU==S5L8701
-    PWRCON &= ~0x4000;
-    PWRCONEXT &= ~0x800;
-    INTMSK |= INTMSK_USB_OTG;
-#elif CONFIG_CPU==S5L8702
-    PWRCON(0) &= ~0x4;
-    PWRCON(1) &= ~0x8;
-    VIC0INTENABLE |= 1 << 19;
-#endif
-
-    usb_drv_exit();
-}
-
-#else /* !HAVE_USBSTACK */
-void usb_enable(bool on)
-{
-    (void)on;
-}
-
-int usb_detect(void)
-{
-    return USB_EXTRACTED;
-}
-
-void usb_init_device(void)
-{
-    DCTL = DCTL_pwronprgdone | DCTL_sftdiscon;
-
-    ORSTCON = 1;  /* Put the PHY into reset (needed to get current down) */
-    PCGCCTL = 1;  /* Shut down PHY clock */
-    OPHYPWR = 0xF;  /* PHY: Power down */
-
-#if CONFIG_CPU==S5L8701
-    PWRCON |= 0x4000;
-    PWRCONEXT |= 0x800;
-#elif CONFIG_CPU==S5L8702
-    PWRCON(0) |= 0x4;
-    PWRCON(1) |= 0x8;
-#endif
-}
-#endif
diff --git a/firmware/target/arm/s5l8700/usb-s5l8701.c b/firmware/target/arm/s5l8700/usb-s5l8701.c
new file mode 100644
index 0000000000..860f54b2d8
--- /dev/null
+++ b/firmware/target/arm/s5l8700/usb-s5l8701.c
@@ -0,0 +1,138 @@
+/***************************************************************************
+*             __________               __   ___.
+*   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+*   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+*   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+*   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+*                     \/            \/     \/    \/            \/
+* $Id$
+*
+* Copyright (C) 2014 Michael Sparmann
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License
+* as published by the Free Software Foundation; either version 2
+* of the License, or (at your option) any later version.
+*
+* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+* KIND, either express or implied.
+*
+****************************************************************************/
+#include <inttypes.h>
+
+#include "config.h"
+#include "usb.h"
+#include "usb_drv.h"
+#ifdef HAVE_USBSTACK
+#include "usb_core.h"
+#include "power.h"
+#endif
+
+#include "s5l8700.h"
+#include "usb-designware.h"
+
+
+const struct usb_dw_config usb_dw_config =
+{
+    /* PHY must run at 60MHz, otherwise there are spurious -EPROTO
+       errors, probably related with GHWCFG4_MIN_AHB_FREQ. */
+    .phytype = DWC_PHYTYPE_UTMI_8,
+
+    /*
+     * Total available FIFO memory: 0x500 words.
+     */
+    .rx_fifosz   = 0x220,
+    /* nptx_fifosz seems limited to 0x200 due to some internal counter
+       misbehaviour (TBC). */
+    .nptx_fifosz = 0x200,
+    /* ptx_fifosz is not writeable (fixed to 0x300), anyway it seems
+       internally limited to a small number, aroung 0x10..0x20 (TBC),
+       we use_ptxfifo_as_plain_buffer to deal with this issue. */
+    .ptx_fifosz  = 0x80,
+    .use_ptxfifo_as_plain_buffer = true,
+
+#ifdef USB_DW_ARCH_SLAVE
+    .disable_double_buffering = false,
+#else
+    .ahb_burst_len = HBSTLEN_INCR4,
+#endif
+};
+
+void usb_dw_target_enable_clocks()
+{
+    PWRCON &= ~0x4000;
+    PWRCONEXT &= ~0x800;
+
+    OPHYPWR = 0;  /* PHY: Power up */
+    udelay(10);
+    OPHYUNK1 = 1;
+    OPHYUNK2 = 0xe3f;
+    ORSTCON = 1;  /* PHY: Assert Software Reset */
+    udelay(10);
+    ORSTCON = 0;  /* PHY: Deassert Software Reset */
+    udelay(10);
+    OPHYUNK3 = 0x600;
+    OPHYCLK = USB_DW_CLOCK;
+    udelay(400);
+}
+
+void usb_dw_target_disable_clocks()
+{
+    OPHYPWR = 0xf;  /* PHY: Power down */
+    udelay(10);
+    ORSTCON = 7;  /* PHY: Assert Software Reset */
+    udelay(10);
+
+    PWRCON |= 0x4000;
+    PWRCONEXT |= 0x800;
+}
+
+void usb_dw_target_enable_irq()
+{
+    INTMSK |= INTMSK_USB_OTG;
+}
+
+void usb_dw_target_disable_irq()
+{
+    INTMSK &= ~INTMSK_USB_OTG;
+}
+
+void usb_dw_target_clear_irq()
+{
+    SRCPND |= INTMSK_USB_OTG;
+}
+
+/* RB API fuctions */
+void usb_enable(bool on)
+{
+#ifdef HAVE_USBSTACK
+    if (on){
+        cpu_boost(1);
+        usb_core_init();
+    } else {
+        usb_core_exit();
+        cpu_boost(0);
+    }
+#else
+    (void)on;
+#endif
+}
+
+int usb_detect(void)
+{
+#ifdef HAVE_USBSTACK
+    if (power_input_status() & POWER_INPUT_USB)
+        return USB_INSERTED;
+#endif
+    return USB_EXTRACTED;
+}
+
+void usb_init_device(void)
+{
+    /* Power up the core clocks to allow writing
+       to some registers needed to power it down */
+    usb_dw_target_disable_irq();
+    usb_dw_target_enable_clocks();
+
+    usb_drv_exit();
+}