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authorRafaël Carré <rafael.carre@gmail.com>2008-11-06 02:31:32 +0000
committerRafaël Carré <rafael.carre@gmail.com>2008-11-06 02:31:32 +0000
commitc3e667c1981c0596aff2429904450d9aa9511747 (patch)
treef006f8e7a6e6a3397bfbb55a5765fb367da98be1 /firmware/export/as3525.h
parent7384454665b7984dbb81d22274004bdcc59c454c (diff)
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AS3525: timer support
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19025 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/as3525.h')
-rw-r--r--firmware/export/as3525.h13
1 files changed, 7 insertions, 6 deletions
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h
index 9bd4b19a20..8d81997b94 100644
--- a/firmware/export/as3525.h
+++ b/firmware/export/as3525.h
@@ -275,12 +275,13 @@ interface */
-#define TIMER_LOAD (*(volatile unsigned long*)(TIMER_BASE + 0x00)) /* 32-bit width */
-#define TIMER_VALUE (*(volatile unsigned long*)(TIMER_BASE + 0x04)) /* 32 bit width */
-#define TIMER_CONTROL (*(volatile unsigned long*)(TIMER_BASE + 0x08)) /* 8 bit width */
-#define TIMER_INTCLR (*(volatile unsigned long*)(TIMER_BASE + 0x0C)) /* clears ir by write access */
-#define TIMER_RIS (*(volatile unsigned long*)(TIMER_BASE + 0x10)) /* 1 bit width */
-#define TIMER_MIS (*(volatile unsigned long*)(TIMER_BASE + 0x14)) /* 1 bit width */
+#define TIMER1_LOAD (*(volatile unsigned long*)(TIMER_BASE + 0x00)) /* 32-bit width */
+#define TIMER1_VALUE (*(volatile unsigned long*)(TIMER_BASE + 0x04)) /* 32 bit width */
+#define TIMER1_CONTROL (*(volatile unsigned long*)(TIMER_BASE + 0x08)) /* 8 bit width */
+#define TIMER1_INTCLR (*(volatile unsigned long*)(TIMER_BASE + 0x0C)) /* clears ir by write access */
+#define TIMER1_RIS (*(volatile unsigned long*)(TIMER_BASE + 0x10)) /* 1 bit width */
+#define TIMER1_MIS (*(volatile unsigned long*)(TIMER_BASE + 0x14)) /* 1 bit width */
+#define TIMER1_BGLOAD (*(volatile unsigned long*)(TIMER_BASE + 0x18)) /* 32-bit width */
/**
* Counter/Timer control register bits