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authorMichael Sevakis <jethead71@rockbox.org>2010-05-04 10:07:53 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-05-04 10:07:53 +0000
commit931e06de64100e28031627964321da3fdb449378 (patch)
tree72a073d7ec3ede9554b394887d43d19fda6e8177 /firmware/export/config/gigabeats.h
parent7480afb3c59f4aebff262e1ce47395a3924ca994 (diff)
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i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25800 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/config/gigabeats.h')
-rw-r--r--firmware/export/config/gigabeats.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/export/config/gigabeats.h b/firmware/export/config/gigabeats.h
index e64ceb0171..2e489239b9 100644
--- a/firmware/export/config/gigabeats.h
+++ b/firmware/export/config/gigabeats.h
@@ -147,7 +147,7 @@
#define GPIO_EVENT_MASK (USE_GPIO1_EVENTS)
/* Define this if target has an additional number of threads specific to it */
-#define TARGET_EXTRA_THREADS 3
+#define TARGET_EXTRA_THREADS 2
/* Type of mobile power - check this out */
#define BATTERY_CAPACITY_DEFAULT 700 /* default battery capacity */