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authorMarcin Bukat <marcin.bukat@gmail.com>2014-03-03 13:21:32 +0100
committerMarcin Bukat <marcin.bukat@gmail.com>2014-03-03 13:21:32 +0100
commit5900bf731518799d5a9bfb598a44d7a21155fa54 (patch)
tree890fcbb94f65bc586989915c613ff322b0af4849 /firmware/export/config
parent3ae07d48a2182fc3b1f8e9b15e6366ff32b92e25 (diff)
downloadrockbox-5900bf731518799d5a9bfb598a44d7a21155fa54.tar.gz
rockbox-5900bf731518799d5a9bfb598a44d7a21155fa54.zip
ingenic: Tweak a few details in crt0.S
1) Avoid load/store delay slot by reorganizing instructions in copy loops 2) Fix off-by-one error in cache initialization code. This was harmless as it simply set line0 twice, now it sets every cacheline only once. 3) Fix off-by-word error in .bss clearing loop. The addiu in branch delay slot even if calculated is not seen by the branch instruction itself, so the code did one word too much in clearing. 4) Fix off-by-word error in deadbeefing stack. See above. Change-Id: Iabb09a55979de7aa2e2b9234273683fc7e9762c5
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