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authorJens Arnold <amiconn@rockbox.org>2007-11-03 22:47:27 +0000
committerJens Arnold <amiconn@rockbox.org>2007-11-03 22:47:27 +0000
commit33acc662569ab01e0770b85a6b32c57ed340c351 (patch)
tree57608dcec79578adc0896084f5fe94f5bff87239 /firmware/export/pp5020.h
parent9784f6b7528e37ff156a694607cdc7b674ac0968 (diff)
downloadrockbox-33acc662569ab01e0770b85a6b32c57ed340c351.tar.gz
rockbox-33acc662569ab01e0770b85a6b32c57ed340c351.zip
* Add newfound GPO32 register to pp502x.h. * Introduce macros for the PP502x's atomic GPIO bit manipulation feature. * Remove clock setup related registers from debug screen, and add DEV_EN2, DEV_EN3 (to be verified) and GPO32 instead.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15443 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/pp5020.h')
-rw-r--r--firmware/export/pp5020.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index 9d2a3b9d94..89acb2e8d2 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -300,6 +300,16 @@
#define GPIOK_INT_CLR (*(volatile unsigned long *)(0x6000d178))
#define GPIOL_INT_CLR (*(volatile unsigned long *)(0x6000d17c))
+/* Standard GPIO addresses + 0x800 allow atomic port manipulation on PP502x.
+ * Bits 8..15 of the written word define which bits are changed, bits 0..7
+ * define the value of those bits. */
+
+#define GPIO_SET_BITWISE(port, mask) \
+ do { *(&port + (0x800/sizeof(long))) = (mask << 8) | mask; } while(0)
+
+#define GPIO_CLEAR_BITWISE(port, mask) \
+ do { *(&port + (0x800/sizeof(long))) = mask << 8; } while(0)
+
/* Device initialization */
#define PP_VER1 (*(volatile unsigned long *)(0x70000000))
#define PP_VER2 (*(volatile unsigned long *)(0x70000004))
@@ -318,6 +328,8 @@
#define INIT_USB 0x80000000
+/* 32 bit GPO port */
+#define GPO32_VAL (*(volatile unsigned long *)(0x70000080))
/* IIS */
#define IISDIV (*(volatile unsigned long*)(0x60006080))