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authorWilliam Wilgus <wilgus.william@gmail.com>2020-08-30 17:22:19 -0400
committerWilliam Wilgus <wilgus.william@gmail.com>2020-08-30 17:26:43 -0400
commit06e9abc428fc5add36bebf9fed8a5a6353e41b21 (patch)
treefd403157dc67a86197dd5836dfe42a303137c541 /firmware/export
parente06ab6816600c03cd8eb5b8a887851c101bcb693 (diff)
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XduooX3 Tweak LCD drive strength and slew
Change-Id: Ic5ee9e700a0c8acffc39b51cedc24ff44d230fd3
Diffstat (limited to 'firmware/export')
-rw-r--r--firmware/export/jz4760b.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/firmware/export/jz4760b.h b/firmware/export/jz4760b.h
index be1e4f3aea..e61689105c 100644
--- a/firmware/export/jz4760b.h
+++ b/firmware/export/jz4760b.h
@@ -275,9 +275,9 @@
#define REG_GPIO_PXDS2(n) REG32(GPIO_PXDS2(n))
#define REG_GPIO_PXDS2S(n) REG32(GPIO_PXDS2S(n))
#define REG_GPIO_PXDS2C(n) REG32(GPIO_PXDS2C(n))
-#define REG_GPIO_PXSL(n) REG32(GPIO_PXSL(n))
-#define REG_GPIO_PXSLS(n) REG32(GPIO_PXSLS(n))
-#define REG_GPIO_PXSLC(n) REG32(GPIO_PXSLC(n))
+#define REG_GPIO_PXSL(n) REG32(GPIO_PXSL(n)) /* Port Slew */
+#define REG_GPIO_PXSLS(n) REG32(GPIO_PXSLS(n)) /* Port Slew -- Fast */
+#define REG_GPIO_PXSLC(n) REG32(GPIO_PXSLC(n)) /* Port Slew -- Slow */
/*----------------------------------------------------------------
* p is the port number (0,1,2,3,4,5)