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authorWilliam Wilgus <me.theuser@yahoo.com>2018-07-27 23:56:32 +0200
committerWilliam Wilgus <me.theuser@yahoo.com>2018-07-27 23:56:32 +0200
commit6f0320a9535bc1aa81d83fa879ac14d5ee603658 (patch)
tree3b12fc361595ecd2249f391e114036cb30150105 /firmware/export
parent400603abdfb4ba7566e0cae8dbed9268f06716dc (diff)
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As3525 v1/v2 Add power savings menu
Allow user to select cpu undervolt There have been quite a few issues across the SANSA AMS line related to CPU undervolting while most players show greatly increased runtime some crash. Rather than constanly upping the voltage we now have a setting with a safe value for all players and the option for lower voltages I plan to add a few other options here later such as disk timings and maybe some other clocks/experimental settings Added: Disk Low speed option for AS3525v2 devices cuts frequency to 12 MHz from 24 MHz Added: Disk Low speed option for AS3525v1 devices cuts frequency to 15.5 MHz from 31 MHz Added: I2c Low Speed AS3525 devices, should be bigger improvement for v1 devices Fixed: Debug menu for AS3525v2 No SDSLOT frequency, Showed IDE freq though it is unused Added: DBOP and SSP underclocking affects display on v1/v2 respectively Fixed: debug menu now has SSP frequency, and SSP_CPSR Update: made settings menu more generic Update: cleaned up code Added: Clip v1 & Fuze v1 didn't have HAVE_ADJUSTABLE_CPU_VOLTAGE. not sure why but, waiting on testing to confirm Added: C200v2 and E200v2 devices and HAVE_ADJUSTABLE_CPU_VOLTAGE. Fixed: v1 devices don't like display timing set lower (dbop) v1 devices don't have a divider set for ssp (causes divide by 0) Fixed: ClipZip display lags with Max SSP divider changed from 0xFE to 0x32 Fixed: v1 devices didn't work properly with highspeed sd cards Added code from http://gerrit.rockbox.org/r/#/c/1704/ Added powersave and IDE interface enable/disable Added: V2 devices now have powersave enabled on sd interface Update: cleaned up code, lang defines, added manual entries Update ssp clock mechanism added calculated ssp divider to clipzip Update turn display clock off when clip+ turns off display Fixed: clipzip wrong register for SSP clock Change-Id: I04137682243be92f0f8d8bf1cfa54fbb1965559b TODO: add other players?
Diffstat (limited to 'firmware/export')
-rw-r--r--firmware/export/config.h6
-rw-r--r--firmware/export/config/sansac200v2.h8
-rw-r--r--firmware/export/config/sansaclip.h8
-rw-r--r--firmware/export/config/sansaclipplus.h5
-rw-r--r--firmware/export/config/sansaclipv2.h5
-rw-r--r--firmware/export/config/sansaclipzip.h5
-rw-r--r--firmware/export/config/sansae200v2.h8
-rw-r--r--firmware/export/config/sansafuze.h8
-rw-r--r--firmware/export/config/sansafuzev2.h5
9 files changed, 58 insertions, 0 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 14664257bf..e362000c18 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -168,6 +168,12 @@
#define SONY_NWZA860_PAD 64 /* The NWZ-A860 is too different (touchscreen) */
#define AGPTEK_ROCKER_PAD 65
+/* CONFIG_POWER_SAVE combinable bit flags*/
+#define POWERSV_CPU 0x1
+#define POWERSV_I2C 0x2
+#define POWERSV_DISK 0x4
+#define POWERSV_DISP 0x8
+
/* CONFIG_REMOTE_KEYPAD */
#define H100_REMOTE 1
#define H300_REMOTE 2
diff --git a/firmware/export/config/sansac200v2.h b/firmware/export/config/sansac200v2.h
index a51f9e3b00..98fbb570fb 100644
--- a/firmware/export/config/sansac200v2.h
+++ b/firmware/export/config/sansac200v2.h
@@ -193,6 +193,14 @@
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ
+/*define this to enable CPU voltage scaling on AMS devices*/
+#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansaclip.h b/firmware/export/config/sansaclip.h
index cdee43d44a..f0300c2ac1 100644
--- a/firmware/export/config/sansaclip.h
+++ b/firmware/export/config/sansaclip.h
@@ -186,6 +186,14 @@
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ
+/*define this to enable CPU voltage scaling on AMS devices*/
+#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansaclipplus.h b/firmware/export/config/sansaclipplus.h
index addf7d86c0..9a307420f4 100644
--- a/firmware/export/config/sansaclipplus.h
+++ b/firmware/export/config/sansaclipplus.h
@@ -206,6 +206,11 @@
/*define this to enable CPU voltage scaling on AMS devices*/
#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK | POWERSV_DISP)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansaclipv2.h b/firmware/export/config/sansaclipv2.h
index cf3f90e363..81a0d4703f 100644
--- a/firmware/export/config/sansaclipv2.h
+++ b/firmware/export/config/sansaclipv2.h
@@ -200,6 +200,11 @@
/*define this to enable CPU voltage scaling on AMS devices*/
#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansaclipzip.h b/firmware/export/config/sansaclipzip.h
index fc9f558eef..8464603c34 100644
--- a/firmware/export/config/sansaclipzip.h
+++ b/firmware/export/config/sansaclipzip.h
@@ -205,6 +205,11 @@
/*define this to enable CPU voltage scaling on AMS devices*/
#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK | POWERSV_DISP)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansae200v2.h b/firmware/export/config/sansae200v2.h
index 96b51f4e12..50e1843189 100644
--- a/firmware/export/config/sansae200v2.h
+++ b/firmware/export/config/sansae200v2.h
@@ -213,6 +213,14 @@
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ
+/*define this to enable CPU voltage scaling on AMS devices*/
+#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansafuze.h b/firmware/export/config/sansafuze.h
index fae3463d75..dedf8c44da 100644
--- a/firmware/export/config/sansafuze.h
+++ b/firmware/export/config/sansafuze.h
@@ -219,6 +219,14 @@
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ
+/*define this to enable CPU voltage scaling on AMS devices*/
+#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"
diff --git a/firmware/export/config/sansafuzev2.h b/firmware/export/config/sansafuzev2.h
index b85e0747a3..3190930b56 100644
--- a/firmware/export/config/sansafuzev2.h
+++ b/firmware/export/config/sansafuzev2.h
@@ -224,6 +224,11 @@
/*define this to enable CPU voltage scaling on AMS devices*/
#define HAVE_ADJUSTABLE_CPU_VOLTAGE
+#ifndef BOOTLOADER
+/*define this with flags for power saving options device supports*/
+#define CONFIG_POWER_SAVING (POWERSV_CPU | POWERSV_I2C | POWERSV_DISK)
+#endif
+
#define BOOTFILE_EXT "sansa"
#define BOOTFILE "rockbox." BOOTFILE_EXT
#define BOOTDIR "/.rockbox"