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| author | Thomas Martitz <kugel@rockbox.org> | 2009-01-27 19:45:00 +0000 |
|---|---|---|
| committer | Thomas Martitz <kugel@rockbox.org> | 2009-01-27 19:45:00 +0000 |
| commit | 78e0e85ffb1fcedff9d2eb24146be1917bbc143d (patch) | |
| tree | 482928f54fdd1099aaacf300a51251b1cf7c5a0f /firmware/export | |
| parent | 067ef10c56fda804c803f5a06aa16d5611261d2a (diff) | |
| download | rockbox-78e0e85ffb1fcedff9d2eb24146be1917bbc143d.tar.gz rockbox-78e0e85ffb1fcedff9d2eb24146be1917bbc143d.zip | |
Redo some parts of my previous commit, thanks Jens and Dave
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19869 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
| -rw-r--r-- | firmware/export/as3525.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index 70462c7e8e..062ac26eac 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h @@ -322,6 +322,8 @@ interface */ #define GPIOA_IC (*(volatile unsigned char*)(GPIOA_BASE+0x41C)) #define GPIOA_AFSEL (*(volatile unsigned char*)(GPIOA_BASE+0x420)) #define GPIOA_PIN(a) (*(volatile unsigned char*)(GPIOA_BASE+(1<<((a)+2)))) +#define GPIOA_DATA (*(volatile unsigned char*)(GPIOA_BASE+(0xff<<2))) + #define GPIOB_DIR (*(volatile unsigned char*)(GPIOB_BASE+0x400)) #define GPIOB_IS (*(volatile unsigned char*)(GPIOB_BASE+0x404)) @@ -333,6 +335,7 @@ interface */ #define GPIOB_IC (*(volatile unsigned char*)(GPIOB_BASE+0x41C)) #define GPIOB_AFSEL (*(volatile unsigned char*)(GPIOB_BASE+0x420)) #define GPIOB_PIN(a) (*(volatile unsigned char*)(GPIOB_BASE+(1<<((a)+2)))) +#define GPIOB_DATA (*(volatile unsigned char*)(GPIOB_BASE+(0xff<<2))) #define GPIOC_DIR (*(volatile unsigned char*)(GPIOC_BASE+0x400)) #define GPIOC_IS (*(volatile unsigned char*)(GPIOC_BASE+0x404)) @@ -344,6 +347,7 @@ interface */ #define GPIOC_IC (*(volatile unsigned char*)(GPIOC_BASE+0x41C)) #define GPIOC_AFSEL (*(volatile unsigned char*)(GPIOC_BASE+0x420)) #define GPIOC_PIN(a) (*(volatile unsigned char*)(GPIOC_BASE+(1<<((a)+2)))) +#define GPIOC_DATA (*(volatile unsigned char*)(GPIOC_BASE+(0xff<<2))) #define GPIOD_DIR (*(volatile unsigned char*)(GPIOD_BASE+0x400)) #define GPIOD_IS (*(volatile unsigned char*)(GPIOD_BASE+0x404)) @@ -355,6 +359,7 @@ interface */ #define GPIOD_IC (*(volatile unsigned char*)(GPIOD_BASE+0x41C)) #define GPIOD_AFSEL (*(volatile unsigned char*)(GPIOD_BASE+0x420)) #define GPIOD_PIN(a) (*(volatile unsigned char*)(GPIOD_BASE+(1<<((a)+2)))) +#define GPIOD_DATA (*(volatile unsigned char*)(GPIOD_BASE+(0xff<<2))) /* ARM PL172 Memory Controller registers */ |