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authorDaniel Stenberg <daniel@haxx.se>2003-02-07 10:08:02 +0000
committerDaniel Stenberg <daniel@haxx.se>2003-02-07 10:08:02 +0000
commite597ca4732c82148f37cb6931ca917818ee31c8a (patch)
tree3174a2cbfa020d02cf7db1c218d3d461533c5102 /firmware/export
parent70e59ede4e28a0972f0c4b3c2fab156ed186dd92 (diff)
downloadrockbox-e597ca4732c82148f37cb6931ca917818ee31c8a.tar.gz
rockbox-e597ca4732c82148f37cb6931ca917818ee31c8a.zip
Move publicly (from apps) accessed files from drivers/ to export/.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@3219 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r--firmware/export/adc.h47
-rw-r--r--firmware/export/ata.h53
-rw-r--r--firmware/export/button.h76
-rw-r--r--firmware/export/fat.h96
-rw-r--r--firmware/export/i2c.h35
-rw-r--r--firmware/export/lcd.h136
-rw-r--r--firmware/export/led.h27
-rw-r--r--firmware/export/mas.h114
-rw-r--r--firmware/export/power.h31
-rw-r--r--firmware/export/rtc.h38
-rw-r--r--firmware/export/serial.h26
-rw-r--r--firmware/export/sh7034.h355
12 files changed, 1034 insertions, 0 deletions
diff --git a/firmware/export/adc.h b/firmware/export/adc.h
new file mode 100644
index 0000000000..1c94eec63e
--- /dev/null
+++ b/firmware/export/adc.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _ADC_H_
+#define _ADC_H_
+
+#define NUM_ADC_CHANNELS 8
+
+#define ADC_BATTERY 0 /* Battery voltage always reads 0x3FF due to
+ silly scaling */
+#ifdef HAVE_FMADC
+#define ADC_CHARGE_REGULATOR 0 /* Uh, we read the battery voltage? */
+#define ADC_USB_POWER 1 /* USB, reads 0x000 when USB is inserted */
+#else
+#define ADC_CHARGE_REGULATOR 1 /* Regulator reference voltage, should read
+ about 0x1c0 when charging, else 0x3FF */
+#define ADC_USB_POWER 2 /* USB, reads 0x3FF when USB is inserted */
+#endif
+
+#define ADC_BUTTON_ROW1 4 /* Used for scanning the keys, different
+ voltages for different keys */
+#define ADC_BUTTON_ROW2 5 /* Used for scanning the keys, different
+ voltages for different keys */
+#define ADC_UNREG_POWER 6 /* Battery voltage with a better scaling */
+#define ADC_EXT_POWER 7 /* The external power voltage, V=X*0.0148 */
+
+#define EXT_SCALE_FACTOR 14800
+
+unsigned short adc_read(int channel);
+void adc_init(void);
+
+#endif
diff --git a/firmware/export/ata.h b/firmware/export/ata.h
new file mode 100644
index 0000000000..7a1fb4a952
--- /dev/null
+++ b/firmware/export/ata.h
@@ -0,0 +1,53 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Alan Korr
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __ATA_H__
+#define __ATA_H__
+
+#include <stdbool.h>
+
+/*
+ ata_spindown() time values:
+ -1 Immediate spindown
+ 0 Timeout disabled
+ 1-240 (time * 5) seconds
+ 241-251((time - 240) * 30) minutes
+ 252 21 minutes
+ 253 Period between 8 and 12 hrs
+ 254 Reserved
+ 255 21 min 15 s
+*/
+extern void ata_enable(bool on);
+extern void ata_spindown(int seconds);
+extern void ata_poweroff(bool enable);
+extern int ata_sleep(void);
+extern bool ata_disk_is_active(void);
+extern int ata_hard_reset(void);
+extern int ata_soft_reset(void);
+extern int ata_init(void);
+extern int ata_read_sectors(unsigned long start, int count, void* buf);
+extern int ata_write_sectors(unsigned long start, int count, void* buf);
+extern void ata_delayed_write(unsigned long sector, void* buf);
+extern void ata_flush(void);
+extern void ata_spin(void);
+extern unsigned short* ata_get_identify(void);
+
+extern long last_disk_activity;
+extern int ata_spinup_time; /* ticks */
+
+#endif
diff --git a/firmware/export/button.h b/firmware/export/button.h
new file mode 100644
index 0000000000..c980e2e36c
--- /dev/null
+++ b/firmware/export/button.h
@@ -0,0 +1,76 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Daniel Stenberg
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _BUTTON_H_
+#define _BUTTON_H_
+
+#include <stdbool.h>
+#include "config.h"
+
+extern struct event_queue button_queue;
+extern long last_keypress;
+
+void button_init (void);
+int button_get (bool block);
+int button_get_w_tmo(int ticks);
+
+/* Shared button codes */
+#define BUTTON_NONE 0x0000
+#define BUTTON_ON 0x0001
+#define BUTTON_UP 0x0010
+#define BUTTON_DOWN 0x0020
+#define BUTTON_LEFT 0x0040
+#define BUTTON_RIGHT 0x0080
+
+/* remote control buttons */
+#define BUTTON_VOL_UP 0x1000
+#define BUTTON_VOL_DOWN 0x1001
+
+/* Button modifiers */
+#define BUTTON_REPEAT 0x4000
+#define BUTTON_REL 0x8000
+
+/* Special message */
+#define BUTTON_LOCKED 0x2000
+
+#ifdef HAVE_RECORDER_KEYPAD
+
+/* Recorder specific button codes */
+#define BUTTON_OFF 0x0002
+#define BUTTON_PLAY 0x0004
+#define BUTTON_F1 0x0100
+#define BUTTON_F2 0x0200
+#define BUTTON_F3 0x0400
+
+#define ALL_BUTTONS (BUTTON_ON | BUTTON_UP | BUTTON_DOWN | BUTTON_LEFT | \
+ BUTTON_RIGHT | BUTTON_OFF | BUTTON_PLAY | BUTTON_F1 | \
+ BUTTON_F2 | BUTTON_F3)
+
+#elif HAVE_PLAYER_KEYPAD
+
+/* Jukebox 6000 and Studio specific button codes */
+#define BUTTON_MENU 0x0002
+#define BUTTON_PLAY BUTTON_UP
+#define BUTTON_STOP BUTTON_DOWN
+
+#define ALL_BUTTONS (BUTTON_ON | BUTTON_UP | BUTTON_DOWN | BUTTON_LEFT | \
+ BUTTON_RIGHT | BUTTON_MENU)
+
+#endif /* HAVE_PLAYER_KEYPAD */
+
+#endif
diff --git a/firmware/export/fat.h b/firmware/export/fat.h
new file mode 100644
index 0000000000..ec71fceb05
--- /dev/null
+++ b/firmware/export/fat.h
@@ -0,0 +1,96 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef FAT_H
+#define FAT_H
+
+#include <stdbool.h>
+
+#define SECTOR_SIZE 512
+
+struct fat_direntry
+{
+ unsigned char name[256]; /* Name plus \0 */
+ unsigned short attr; /* Attributes */
+ unsigned char crttimetenth; /* Millisecond creation
+ time stamp (0-199) */
+ unsigned short crttime; /* Creation time */
+ unsigned short crtdate; /* Creation date */
+ unsigned short lstaccdate; /* Last access date */
+ unsigned short wrttime; /* Last write time */
+ unsigned short wrtdate; /* Last write date */
+ unsigned int filesize; /* File size in bytes */
+ int firstcluster; /* fstclusterhi<<16 + fstcluslo */
+};
+
+#define FAT_ATTR_READ_ONLY 0x01
+#define FAT_ATTR_HIDDEN 0x02
+#define FAT_ATTR_SYSTEM 0x04
+#define FAT_ATTR_VOLUME_ID 0x08
+#define FAT_ATTR_DIRECTORY 0x10
+#define FAT_ATTR_ARCHIVE 0x20
+
+struct fat_file
+{
+ int firstcluster; /* first cluster in file */
+ int lastcluster; /* cluster of last access */
+ int lastsector; /* sector of last access */
+ int sectornum; /* sector number in this cluster */
+ unsigned int direntry; /* short dir entry index from start of dir */
+ unsigned int direntries; /* number of dir entries used by this file */
+ unsigned int dircluster; /* first cluster of dir */
+ bool eof;
+};
+
+struct fat_dir
+{
+ unsigned int entry;
+ unsigned int entrycount;
+ int sector;
+ struct fat_file file;
+ unsigned char sectorcache[3][SECTOR_SIZE];
+};
+
+
+extern int fat_mount(int startsector);
+extern void fat_size(unsigned int* size, unsigned int* free);
+extern void fat_recalc_free(void);
+
+extern int fat_create_dir(unsigned int currdir, char *name);
+extern int fat_startsector(void);
+extern int fat_open(unsigned int cluster,
+ struct fat_file* ent,
+ struct fat_dir* dir);
+extern int fat_create_file(char* name,
+ struct fat_file* ent,
+ struct fat_dir* dir);
+extern int fat_readwrite(struct fat_file *ent, int sectorcount,
+ void* buf, bool write );
+extern int fat_closewrite(struct fat_file *ent, int size, int attr);
+extern int fat_seek(struct fat_file *ent, unsigned int sector );
+extern int fat_remove(struct fat_file *ent);
+extern int fat_truncate(struct fat_file *ent);
+extern int fat_rename(struct fat_file* file,
+ unsigned char* newname,
+ int size, int attr);
+
+extern int fat_opendir(struct fat_dir *ent, unsigned int currdir);
+extern int fat_getnext(struct fat_dir *ent, struct fat_direntry *entry);
+
+#endif
diff --git a/firmware/export/i2c.h b/firmware/export/i2c.h
new file mode 100644
index 0000000000..ed9a5e678d
--- /dev/null
+++ b/firmware/export/i2c.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef I2C_H
+#define I2C_H
+
+extern void i2c_init(void);
+extern void i2c_begin(void);
+extern void i2c_end(void);
+extern int i2c_write(int device, unsigned char* buf, int count );
+extern int i2c_read(int device, unsigned char* buf, int count );
+extern int i2c_readmem(int device, int address, unsigned char* buf, int count );
+extern void i2c_outb(unsigned char byte);
+extern unsigned char i2c_inb(int ack);
+extern void i2c_start(void);
+extern void i2c_stop(void);
+extern void i2c_ack(int bit);
+extern int i2c_getack(void);
+
+#endif
diff --git a/firmware/export/lcd.h b/firmware/export/lcd.h
new file mode 100644
index 0000000000..6149dc38d7
--- /dev/null
+++ b/firmware/export/lcd.h
@@ -0,0 +1,136 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Alan Korr
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef __LCD_H__
+#define __LCD_H__
+
+#include <stdbool.h>
+#include "sh7034.h"
+#include "config.h"
+
+/* common functions */
+extern void lcd_init(void);
+extern void lcd_clear_display(void);
+extern void lcd_backlight(bool on);
+extern void lcd_puts(int x, int y, unsigned char *string);
+extern void lcd_putc(int x, int y, unsigned short ch);
+
+extern void lcd_puts_scroll(int x, int y, unsigned char* string );
+extern void lcd_icon(int icon, bool enable);
+extern void lcd_stop_scroll(void);
+extern void lcd_scroll_speed( int speed );
+extern void lcd_scroll_delay( int ms );
+extern void lcd_set_contrast(int val);
+extern void lcd_write( bool command, int byte );
+
+#if defined(SIMULATOR) || defined(HAVE_LCD_BITMAP)
+extern void lcd_update(void);
+
+/* update a fraction of the screen */
+extern void lcd_update_rect(int x, int y, int width, int height);
+#else
+ #define lcd_update()
+ #define lcd_update_rect(x,y,w,h)
+#endif
+
+#if defined(SIMULATOR)
+#include "sim_icons.h"
+#endif
+
+#ifdef HAVE_LCD_CHARCELLS
+
+/* Icon definitions for lcd_icon() */
+enum
+{
+ ICON_BATTERY = 0,
+ ICON_BATTERY_1,
+ ICON_BATTERY_2,
+ ICON_BATTERY_3,
+ ICON_USB,
+ ICON_PLAY,
+ ICON_RECORD,
+ ICON_PAUSE,
+ ICON_AUDIO,
+ ICON_REPEAT,
+ ICON_1,
+ ICON_VOLUME,
+ ICON_VOLUME_1,
+ ICON_VOLUME_2,
+ ICON_VOLUME_3,
+ ICON_VOLUME_4,
+ ICON_VOLUME_5,
+ ICON_PARAM
+};
+
+extern void lcd_define_hw_pattern (int which,char *pattern,int length);
+extern void lcd_define_pattern (int which,char *pattern);
+extern void lcd_double_height (bool on);
+unsigned char lcd_get_locked_pattern(void);
+void lcd_unlock_pattern(unsigned char pat);
+void lcd_allow_bidirectional_scrolling(bool on);
+extern void lcd_bidir_scroll(int threshold);
+void lcd_put_cursor(int x, int y, char cursor_char);
+void lcd_remove_cursor(void);
+#endif
+
+#if defined(HAVE_LCD_BITMAP) || defined(SIMULATOR)
+#if defined(HAVE_LCD_CHARCELLS) && defined(SIMULATOR)
+#define LCD_WIDTH (4*11*6) /* Display width in pixels */
+#define LCD_HEIGHT (4*16+2*24) /* 4*char + 2*icons */
+#else
+#define LCD_WIDTH 112 /* Display width in pixels */
+#define LCD_HEIGHT 64 /* Display height in pixels */
+#endif
+
+#define DRAW_PIXEL(x,y) lcd_framebuffer[(x)][(y)/8] |= (1<<((y)&7))
+#define CLEAR_PIXEL(x,y) lcd_framebuffer[(x)][(y)/8] &= ~(1<<((y)&7))
+#define INVERT_PIXEL(x,y) lcd_framebuffer[(x)][(y)/8] ^= (1<<((y)&7))
+
+/*
+ * Memory copy of display bitmap
+ */
+extern unsigned char lcd_framebuffer[LCD_WIDTH][LCD_HEIGHT/8];
+
+extern void lcd_setmargins(int xmargin, int ymargin);
+extern int lcd_getxmargin(void);
+extern int lcd_getymargin(void);
+extern void lcd_bitmap (unsigned char *src, int x, int y, int nx, int ny,
+ bool clear);
+extern void lcd_clearrect (int x, int y, int nx, int ny);
+extern void lcd_fillrect (int x, int y, int nx, int ny);
+extern void lcd_drawrect (int x, int y, int nx, int ny);
+extern void lcd_invertrect (int x, int y, int nx, int ny);
+extern void lcd_drawline( int x1, int y1, int x2, int y2 );
+extern void lcd_clearline( int x1, int y1, int x2, int y2 );
+extern void lcd_drawpixel(int x, int y);
+extern void lcd_clearpixel(int x, int y);
+extern void lcd_invertpixel(int x, int y);
+extern void lcd_roll(int pixels);
+
+extern void lcd_bidir_scroll(int threshold);
+extern void lcd_scroll_step(int pixels);
+extern void lcd_setfont(int font);
+extern void lcd_putsxy(int x, int y, unsigned char *string);
+extern int lcd_getstringsize(unsigned char *str, int *w, int *h);
+extern int lcd_getstringsize(unsigned char *str, int *w, int *h);
+
+#endif /* CHARCELLS / BITMAP */
+
+
+#endif /* __LCD_H__ */
diff --git a/firmware/export/led.h b/firmware/export/led.h
new file mode 100644
index 0000000000..9b2552f738
--- /dev/null
+++ b/firmware/export/led.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Alan Korr
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef __LED_H__
+#define __LED_H__
+
+#include <stdbool.h>
+
+extern void led( bool on );
+
+#endif
diff --git a/firmware/export/mas.h b/firmware/export/mas.h
new file mode 100644
index 0000000000..573b9b6b37
--- /dev/null
+++ b/firmware/export/mas.h
@@ -0,0 +1,114 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _MAS_H_
+#define _MAS_H_
+
+#define MAS_BANK_D0 0
+#define MAS_BANK_D1 1
+
+#define MAX_PEAK 0x8000
+
+/*
+ MAS I2C defs
+*/
+#ifdef HAVE_MAS3587F
+#define MAS_ADR 0x3c
+#define MAS_DEV_WRITE (MAS_ADR | 0x00)
+#define MAS_DEV_READ (MAS_ADR | 0x01)
+#else
+#define MAS_ADR 0x3a
+#define MAS_DEV_WRITE (MAS_ADR | 0x00)
+#define MAS_DEV_READ (MAS_ADR | 0x01)
+#endif
+
+/* registers..*/
+#ifdef HAVE_MAS3587F
+#define MAS_DATA_WRITE 0x68
+#define MAS_DATA_READ 0x69
+#define MAS_CODEC_WRITE 0x6c
+#define MAS_CODEC_READ 0x6d
+#define MAS_CONTROL 0x6a
+#define MAS_DCCF 0x76
+#define MAS_DCFR 0x77
+#else
+#define MAS_DATA_WRITE 0x68
+#define MAS_DATA_READ 0x69
+#define MAS_CONTROL 0x6a
+#endif
+
+/*
+ * MAS register
+ */
+#define MAS_REG_DCCF 0x8e
+#define MAS_REG_MUTE 0xaa
+#define MAS_REG_PIODATA 0xc8
+#define MAS_REG_StartUpConfig 0xe6
+#define MAS_REG_KPRESCALE 0xe7
+#define MAS_REG_KBASS 0x6b
+#define MAS_REG_KTREBLE 0x6f
+#ifdef HAVE_MAS3587F
+#define MAS_REG_KMDB_SWITCH 0x21
+#define MAS_REG_KMDB_STR 0x22
+#define MAS_REG_KMDB_HAR 0x23
+#define MAS_REG_KMDB_FC 0x24
+#define MAS_REG_KLOUDNESS 0x1e
+#define MAS_REG_QPEAK_L 0x0a
+#define MAS_REG_QPEAK_R 0x0b
+#define MAS_REG_DQPEAK_L 0x0c
+#define MAS_REG_DQPEAK_R 0x0d
+#define MAS_REG_KAVC 0x12
+#endif
+
+/*
+ * MAS commands
+ */
+#ifdef HAVE_MAS3587F
+#define MAS_CMD_READ_ANCILLARY 0x50
+#define MAS_CMD_FAST_PRG_DL 0x60
+#define MAS_CMD_READ_IC_VER 0x70
+#define MAS_CMD_READ_REG 0xa0
+#define MAS_CMD_WRITE_REG 0xb0
+#define MAS_CMD_READ_D0_MEM 0xc0
+#define MAS_CMD_READ_D1_MEM 0xd0
+#define MAS_CMD_WRITE_D0_MEM 0xe0
+#define MAS_CMD_WRITE_D1_MEM 0xf0
+#else
+#define MAS_CMD_READ_ANCILLARY 0x30
+#define MAS_CMD_WRITE_REG 0x90
+#define MAS_CMD_WRITE_D0_MEM 0xa0
+#define MAS_CMD_WRITE_D1_MEM 0xb0
+#define MAS_CMD_READ_REG 0xd0
+#define MAS_CMD_READ_D0_MEM 0xe0
+#define MAS_CMD_READ_D1_MEM 0xf0
+#endif
+
+int mas_default_read(unsigned short *buf);
+int mas_run(unsigned short address);
+int mas_readmem(int bank, int addr, unsigned long* dest, int len);
+int mas_writemem(int bank, int addr, unsigned long* src, int len);
+int mas_readreg(int reg);
+int mas_writereg(int reg, unsigned int val);
+void mas_reset(void);
+int mas_direct_config_read(unsigned char reg);
+int mas_direct_config_write(unsigned char reg, unsigned int val);
+int mas_codec_writereg(int reg, unsigned int val);
+int mas_codec_readreg(int reg);
+unsigned long mas_readver(void);
+
+#endif
diff --git a/firmware/export/power.h b/firmware/export/power.h
new file mode 100644
index 0000000000..f4e7a0b990
--- /dev/null
+++ b/firmware/export/power.h
@@ -0,0 +1,31 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _POWER_H_
+#define _POWER_H_
+
+#ifdef HAVE_CHARGE_CTRL
+extern bool charger_enabled;
+#endif
+
+bool charger_inserted(void);
+void charger_enable(bool on);
+void ide_power_enable(bool on);
+void power_off(void);
+
+#endif
diff --git a/firmware/export/rtc.h b/firmware/export/rtc.h
new file mode 100644
index 0000000000..fd1cd50274
--- /dev/null
+++ b/firmware/export/rtc.h
@@ -0,0 +1,38 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Linus Nielsen Feltzing, Uwe Freese
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _RTC_H_
+#define _RTC_H_
+
+#include <stdbool.h>
+
+#ifdef HAVE_RTC
+void rtc_init(void);
+int rtc_read(unsigned char address);
+int rtc_read_multiple(unsigned char address, unsigned char *buf, int numbytes);
+int rtc_write(unsigned char address, unsigned char value);
+
+#ifdef HAVE_ALARM_MOD
+void rtc_set_alarm(int h, int m);
+void rtc_get_alarm(int *h, int *m);
+bool rtc_enable_alarm(bool enable);
+#endif /* HAVE_ALARM_MOD */
+
+#endif /* HAVE_RTC */
+
+#endif
diff --git a/firmware/export/serial.h b/firmware/export/serial.h
new file mode 100644
index 0000000000..f2e5a945dd
--- /dev/null
+++ b/firmware/export/serial.h
@@ -0,0 +1,26 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Alan Korr
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef __SERIAL_H__
+#define __SERIAL_H__
+
+extern void serial_setup (void);
+extern int remote_control_rx(void);
+
+#endif
diff --git a/firmware/export/sh7034.h b/firmware/export/sh7034.h
new file mode 100644
index 0000000000..5dd7d96d5f
--- /dev/null
+++ b/firmware/export/sh7034.h
@@ -0,0 +1,355 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Alan Korr
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef __SH7034_H__
+#define __SH7034_H__
+
+#define GBR 0x00000000
+
+/* register address macros: */
+
+#define SMR0_ADDR 0x05FFFEC0
+#define BRR0_ADDR 0x05FFFEC1
+#define SCR0_ADDR 0x05FFFEC2
+#define TDR0_ADDR 0x05FFFEC3
+#define SSR0_ADDR 0x05FFFEC4
+#define RDR0_ADDR 0x05FFFEC5
+#define SMR1_ADDR 0x05FFFEC8
+#define BRR1_ADDR 0x05FFFEC9
+#define SCR1_ADDR 0x05FFFECA
+#define TDR1_ADDR 0x05FFFECB
+#define SSR1_ADDR 0x05FFFECC
+#define RDR1_ADDR 0x05FFFECD
+
+#define ADDRAH_ADDR 0x05FFFEE0
+#define ADDRAL_ADDR 0x05FFFEE1
+#define ADDRBH_ADDR 0x05FFFEE2
+#define ADDRBL_ADDR 0x05FFFEE3
+#define ADDRCH_ADDR 0x05FFFEE4
+#define ADDRCL_ADDR 0x05FFFEE5
+#define ADDRDH_ADDR 0x05FFFEE6
+#define ADDRDL_ADDR 0x05FFFEE7
+#define ADCSR_ADDR 0x05FFFEE8
+#define ADCR_ADDR 0x05FFFEE9
+
+#define TSTR_ADDR 0x05FFFF00
+#define TSNC_ADDR 0x05FFFF01
+#define TMDR_ADDR 0x05FFFF02
+#define TFCR_ADDR 0x05FFFF03
+#define TCR0_ADDR 0x05FFFF04
+#define TIOR0_ADDR 0x05FFFF05
+#define TIER0_ADDR 0x05FFFF06
+#define TSR0_ADDR 0x05FFFF07
+#define TCNT0_ADDR 0x05FFFF08
+#define GRA0_ADDR 0x05FFFF0A
+#define GRB0_ADDR 0x05FFFF0C
+#define TCR1_ADDR 0x05FFFF0E
+#define TIOR1_ADDR 0x05FFFF0F
+#define TIER1_ADDR 0x05FFFF10
+#define TSR1_ADDR 0x05FFFF11
+#define TCNT1_ADDR 0x05FFFF12
+#define GRA1_ADDR 0x05FFFF14
+#define GRB1_ADDR 0x05FFFF16
+#define TCR2_ADDR 0x05FFFF18
+#define TIOR2_ADDR 0x05FFFF19
+#define TIER2_ADDR 0x05FFFF1A
+#define TSR2_ADDR 0x05FFFF1B
+#define TCNT2_ADDR 0x05FFFF1C
+#define GRA2_ADDR 0x05FFFF1E
+#define GRB2_ADDR 0x05FFFF20
+#define TCR3_ADDR 0x05FFFF22
+#define TIOR3_ADDR 0x05FFFF23
+#define TIER3_ADDR 0x05FFFF24
+#define TSR3_ADDR 0x05FFFF25
+#define TCNT3_ADDR 0x05FFFF26
+#define GRA3_ADDR 0x05FFFF28
+#define GRB3_ADDR 0x05FFFF2A
+#define BRA3_ADDR 0x05FFFF2C
+#define BRB3_ADDR 0x05FFFF2E
+#define TOCR_ADDR 0x05FFFF31
+#define TCR4_ADDR 0x05FFFF32
+#define TIOR4_ADDR 0x05FFFF33
+#define TIER4_ADDR 0x05FFFF34
+#define TSR4_ADDR 0x05FFFF35
+#define TCNT4_ADDR 0x05FFFF36
+#define GRA4_ADDR 0x05FFFF38
+#define GRB4_ADDR 0x05FFFF3A
+#define BRA4_ADDR 0x05FFFF3C
+#define BRB4_ADDR 0x05FFFF3E
+
+#define SAR0_ADDR 0x05FFFF40
+#define DAR0_ADDR 0x05FFFF44
+#define DMAOR_ADDR 0x05FFFF48
+#define DTCR0_ADDR 0x05FFFF4A
+#define CHCR0_ADDR 0x05FFFF4E
+#define SAR1_ADDR 0x05FFFF50
+#define DAR1_ADDR 0x05FFFF54
+#define DTCR1_ADDR 0x05FFFF5A
+#define CHCR1_ADDR 0x05FFFF5E
+#define SAR2_ADDR 0x05FFFF60
+#define DAR2_ADDR 0x05FFFF64
+#define DTCR2_ADDR 0x05FFFF6A
+#define CHCR2_ADDR 0x05FFFF6E
+#define SAR3_ADDR 0x05FFFF70
+#define DAR3_ADDR 0x05FFFF74
+#define DTCR3_ADDR 0x05FFFF7A
+#define CHCR3_ADDR 0x05FFFF7E
+
+#define IPRA_ADDR 0x05FFFF84
+#define IPRB_ADDR 0x05FFFF86
+#define IPRC_ADDR 0x05FFFF88
+#define IPRD_ADDR 0x05FFFF8A
+#define IPRE_ADDR 0x05FFFF8C
+#define ICR_ADDR 0x05FFFF8E
+
+#define BARH_ADDR 0x05FFFF90
+#define BARL_ADDR 0x05FFFF92
+#define BAMRH_ADDR 0x05FFFF94
+#define BAMRL_ADDR 0x05FFFF96
+#define BBR_ADDR 0x05FFFF98
+
+#define BCR_ADDR 0x05FFFFA0
+#define WCR1_ADDR 0x05FFFFA2
+#define WCR2_ADDR 0x05FFFFA4
+#define WCR3_ADDR 0x05FFFFA6
+#define DCR_ADDR 0x05FFFFA8
+#define PCR_ADDR 0x05FFFFAA
+#define RCR_ADDR 0x05FFFFAC
+#define RTCSR_ADDR 0x05FFFFAE
+#define RTCNT_ADDR 0x05FFFFB0
+#define RTCOR_ADDR 0x05FFFFB2
+
+#define TCSR_ADDR 0x05FFFFB8
+#define TCNT_ADDR 0x05FFFFB9
+#define RSTCSR_ADDR 0x05FFFFBB
+
+#define SBYCR_ADDR 0x05FFFFBC
+
+#define PADR_ADDR 0x05FFFFC0
+#define PBDR_ADDR 0x05FFFFC2
+#define PAIOR_ADDR 0x05FFFFC4
+#define PBIOR_ADDR 0x05FFFFC6
+#define PACR1_ADDR 0x05FFFFC8
+#define PACR2_ADDR 0x05FFFFCA
+#define PBCR1_ADDR 0x05FFFFCC
+#define PBCR2_ADDR 0x05FFFFCE
+#define PCDR_ADDR 0x05FFFFD0
+
+#define CASCR_ADDR 0x05FFFFEE
+
+/* Port B data register bits */
+#define PBDR_LCD_SDA 0x0001 /* LCD serial data */
+#define PBDR_LCD_SCK 0x0002 /* LCD serial clock */
+#define PBDR_LCD_DC 0x0004 /* LCD data (1) / command (0) */
+#define PBDR_LCD_CS1 0x0008 /* LCD chip select 1 (active low) */
+#define PBDR_BTN_OFF 0x0010 /* Off button (active low) */
+#define PBDR_LED_RED 0x0040 /* Red LED */
+#define PBDR_BTN_ON 0x0100 /* On button (active low) */
+
+/* A/D control/status register bits */
+#define ADCSR_CH 0x07 /* Channel/group select */
+#define ADCSR_CKS 0x08 /* Clock select */
+#define ADCSR_SCAN 0x10 /* Scan mode */
+#define ADCSR_ADST 0x20 /* A/D start */
+#define ADCSR_ADIE 0x40 /* A/D interrupt enable */
+#define ADCSR_ADF 0x80 /* A/D end flag */
+
+/* A/D control register bits */
+#define ADCR_TRGE 0x80 /* Trigger enable */
+
+/* register macros for direct access: */
+
+#define SMR0 (*((volatile unsigned char*)SMR0_ADDR))
+#define BRR0 (*((volatile unsigned char*)BRR0_ADDR))
+#define SCR0 (*((volatile unsigned char*)SCR0_ADDR))
+#define TDR0 (*((volatile unsigned char*)TDR0_ADDR))
+#define SSR0 (*((volatile unsigned char*)SSR0_ADDR))
+#define RDR0 (*((volatile unsigned char*)RDR0_ADDR))
+#define SMR1 (*((volatile unsigned char*)SMR1_ADDR))
+#define BRR1 (*((volatile unsigned char*)BRR1_ADDR))
+#define SCR1 (*((volatile unsigned char*)SCR1_ADDR))
+#define TDR1 (*((volatile unsigned char*)TDR1_ADDR))
+#define SSR1 (*((volatile unsigned char*)SSR1_ADDR))
+#define RDR1 (*((volatile unsigned char*)RDR1_ADDR))
+
+#define ADDRA (*((volatile unsigned short*)ADDRAH_ADDR)) /* combined */
+#define ADDRAH (*((volatile unsigned char*)ADDRAH_ADDR))
+#define ADDRAL (*((volatile unsigned char*)ADDRAL_ADDR))
+#define ADDRB (*((volatile unsigned short*)ADDRBH_ADDR)) /* combined */
+#define ADDRBH (*((volatile unsigned char*)ADDRBH_ADDR))
+#define ADDRBL (*((volatile unsigned char*)ADDRBL_ADDR))
+#define ADDRC (*((volatile unsigned short*)ADDRCH_ADDR)) /* combined */
+#define ADDRCH (*((volatile unsigned char*)ADDRCH_ADDR))
+#define ADDRCL (*((volatile unsigned char*)ADDRCL_ADDR))
+#define ADDRD (*((volatile unsigned short*)ADDRDH_ADDR)) /* combined */
+#define ADDRDH (*((volatile unsigned char*)ADDRDH_ADDR))
+#define ADDRDL (*((volatile unsigned char*)ADDRDL_ADDR))
+#define ADCSR (*((volatile unsigned char*)ADCSR_ADDR))
+#define ADCR (*((volatile unsigned char*)ADCR_ADDR))
+
+#define TSTR (*((volatile unsigned char*)TSTR_ADDR))
+#define TSNC (*((volatile unsigned char*)TSNC_ADDR))
+#define TMDR (*((volatile unsigned char*)TMDR_ADDR))
+#define TFCR (*((volatile unsigned char*)TFCR_ADDR))
+#define TCR0 (*((volatile unsigned char*)TCR0_ADDR))
+#define TIOR0 (*((volatile unsigned char*)TIOR0_ADDR))
+#define TIER0 (*((volatile unsigned char*)TIER0_ADDR))
+#define TSR0 (*((volatile unsigned char*)TSR0_ADDR))
+#define TCNT0 (*((volatile unsigned short*)TCNT0_ADDR))
+#define GRA0 (*((volatile unsigned short*)GRA0_ADDR))
+#define GRB0 (*((volatile unsigned short*)GRB0_ADDR))
+#define TCR1 (*((volatile unsigned char*)TCR1_ADDR))
+#define TIOR1 (*((volatile unsigned char*)TIOR1_ADDR))
+#define TIER1 (*((volatile unsigned char*)TIER1_ADDR))
+#define TSR1 (*((volatile unsigned char*)TSR1_ADDR))
+#define TCNT1 (*((volatile unsigned short*)TCNT1_ADDR))
+#define GRA1 (*((volatile unsigned short*)GRA1_ADDR))
+#define GRB1 (*((volatile unsigned short*)GRB1_ADDR))
+#define TCR2 (*((volatile unsigned char*)TCR2_ADDR))
+#define TIOR2 (*((volatile unsigned char*)TIOR2_ADDR))
+#define TIER2 (*((volatile unsigned char*)TIER2_ADDR))
+#define TSR2 (*((volatile unsigned char*)TSR2_ADDR))
+#define TCNT2 (*((volatile unsigned short*)TCNT2_ADDR))
+#define GRA2 (*((volatile unsigned short*)GRA2_ADDR))
+#define GRB2 (*((volatile unsigned short*)GRB2_ADDR))
+#define TCR3 (*((volatile unsigned char*)TCR3_ADDR))
+#define TIOR3 (*((volatile unsigned char*)TIOR3_ADDR))
+#define TIER3 (*((volatile unsigned char*)TIER3_ADDR))
+#define TSR3 (*((volatile unsigned char*)TSR3_ADDR))
+#define TCNT3 (*((volatile unsigned short*)TCNT3_ADDR))
+#define GRA3 (*((volatile unsigned short*)GRA3_ADDR))
+#define GRB3 (*((volatile unsigned short*)GRB3_ADDR))
+#define BRA3 (*((volatile unsigned short*)BRA3_ADDR))
+#define BRB3 (*((volatile unsigned short*)BRB3_ADDR))
+#define TOCR (*((volatile unsigned char*)TOCR_ADDR))
+#define TCR4 (*((volatile unsigned char*)TCR4_ADDR))
+#define TIOR4 (*((volatile unsigned char*)TIOR4_ADDR))
+#define TIER4 (*((volatile unsigned char*)TIER4_ADDR))
+#define TSR4 (*((volatile unsigned char*)TSR4_ADDR))
+#define TCNT4 (*((volatile unsigned short*)TCNT4_ADDR))
+#define GRA4 (*((volatile unsigned short*)GRA4_ADDR))
+#define GRB4 (*((volatile unsigned short*)GRB4_ADDR))
+#define BRA4 (*((volatile unsigned short*)BRA4_ADDR))
+#define BRB4 (*((volatile unsigned short*)BRB4_ADDR))
+
+#define SAR0 (*((volatile unsigned long*)SAR0_ADDR))
+#define DAR0 (*((volatile unsigned long*)DAR0_ADDR))
+#define DMAOR (*((volatile unsigned short*)DMAOR_ADDR))
+#define DTCR0 (*((volatile unsigned short*)DTCR0_ADDR))
+#define CHCR0 (*((volatile unsigned short*)CHCR0_ADDR))
+#define SAR1 (*((volatile unsigned long*)SAR1_ADDR))
+#define DAR1 (*((volatile unsigned long*)DAR1_ADDR))
+#define DTCR1 (*((volatile unsigned short*)DTCR1_ADDR))
+#define CHCR1 (*((volatile unsigned short*)CHCR1_ADDR))
+#define SAR2 (*((volatile unsigned long*)SAR2_ADDR))
+#define DAR2 (*((volatile unsigned long*)DAR2_ADDR))
+#define DTCR2 (*((volatile unsigned short*)DTCR2_ADDR))
+#define HCR2 (*((volatile unsigned short*)CHCR2_ADDR))
+#define SAR3 (*((volatile unsigned long*)SAR3_ADDR))
+#define DAR3 (*((volatile unsigned long*)DAR3_ADDR))
+#define DTCR3 (*((volatile unsigned short*)DTCR3_ADDR))
+#define CHCR3 (*((volatile unsigned short*)CHCR3_ADDR))
+
+#define IPRA (*((volatile unsigned short*)IPRA_ADDR))
+#define IPRB (*((volatile unsigned short*)IPRB_ADDR))
+#define IPRC (*((volatile unsigned short*)IPRC_ADDR))
+#define IPRD (*((volatile unsigned short*)IPRD_ADDR))
+#define IPRE (*((volatile unsigned short*)IPRE_ADDR))
+#define ICR (*((volatile unsigned short*)ICR_ADDR))
+
+#define BAR (*((volatile unsigned long*)BARH_ADDR)) /* combined */
+#define BARH (*((volatile unsigned short*)BARH_ADDR))
+#define BARL (*((volatile unsigned short*)BARL_ADDR))
+#define BAMR (*((volatile unsigned long*)BAMRH_ADDR)) /* combined */
+#define BAMRH (*((volatile unsigned short*)BAMRH_ADDR))
+#define BAMRL (*((volatile unsigned short*)BAMRL_ADDR))
+#define BBR (*((volatile unsigned short*)BBR_ADDR))
+
+#define BCR (*((volatile unsigned short*)BCR_ADDR))
+#define WCR1 (*((volatile unsigned short*)WCR1_ADDR))
+#define WCR2 (*((volatile unsigned short*)WCR2_ADDR))
+#define WCR3 (*((volatile unsigned short*)WCR3_ADDR))
+#define DCR (*((volatile unsigned short*)DCR_ADDR))
+#define PCR (*((volatile unsigned short*)PCR_ADDR))
+#define RCR (*((volatile unsigned short*)RCR_ADDR))
+#define RTCSR (*((volatile unsigned short*)RTCSR_ADDR))
+#define RTCNT (*((volatile unsigned short*)RTCNT_ADDR))
+#define RTCOR (*((volatile unsigned short*)RTCOR_ADDR))
+
+#define TCSR (*((volatile unsigned char*)TCSR_ADDR))
+#define TCNT (*((volatile unsigned char*)TCNT_ADDR))
+#define RSTCSR (*((volatile unsigned char*)RSTCSR_ADDR))
+
+#define SBYCR (*((volatile unsigned char*)SBYCR_ADDR))
+
+#define PADR (*((volatile unsigned short*)PADR_ADDR))
+#define PBDR (*((volatile unsigned short*)PBDR_ADDR))
+#define PAIOR (*((volatile unsigned short*)PAIOR_ADDR))
+#define PBIOR (*((volatile unsigned short*)PBIOR_ADDR))
+#define PACR1 (*((volatile unsigned short*)PACR1_ADDR))
+#define PACR2 (*((volatile unsigned short*)PACR2_ADDR))
+#define PBCR1 (*((volatile unsigned short*)PBCR1_ADDR))
+#define PBCR2 (*((volatile unsigned short*)PBCR2_ADDR))
+#define PCDR (*((volatile unsigned short*)PCDR_ADDR))
+
+#define CASCR (*((volatile unsigned char*)CASCR_ADDR))
+
+/***************************************************************************
+ * Register bit definitions
+ **************************************************************************/
+
+/*
+ * Serial mode register bits
+ */
+
+#define SYNC_MODE 0x80
+#define SEVEN_BIT_DATA 0x40
+#define PARITY_ON 0x20
+#define ODD_PARITY 0x10
+#define STOP_BITS_2 0x08
+#define ENABLE_MULTIP 0x04
+#define PHI_64 0x03
+#define PHI_16 0x02
+#define PHI_4 0x01
+
+/*
+ * Serial control register bits
+ */
+#define SCI_TIE 0x80 /* Transmit interrupt enable */
+#define SCI_RIE 0x40 /* Receive interrupt enable */
+#define SCI_TE 0x20 /* Transmit enable */
+#define SCI_RE 0x10 /* Receive enable */
+#define SCI_MPIE 0x08 /* Multiprocessor interrupt enable */
+#define SCI_TEIE 0x04 /* Transmit end interrupt enable */
+#define SCI_CKE1 0x02 /* Clock enable 1 */
+#define SCI_CKE0 0x01 /* Clock enable 0 */
+
+/*
+ * Serial status register bits
+ */
+#define SCI_TDRE 0x80 /* Transmit data register empty */
+#define SCI_RDRF 0x40 /* Receive data register full */
+#define SCI_ORER 0x20 /* Overrun error */
+#define SCI_FER 0x10 /* Framing error */
+#define SCI_PER 0x08 /* Parity error */
+#define SCI_TEND 0x04 /* Transmit end */
+#define SCI_MPB 0x02 /* Multiprocessor bit */
+#define SCI_MPBT 0x01 /* Multiprocessor bit transfer */
+
+#endif