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| author | Michael Sevakis <jethead71@rockbox.org> | 2011-12-17 07:27:24 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2011-12-17 07:27:24 +0000 |
| commit | 6a67707b5ec3b2c649c401550bb7fdef2b7c8d07 (patch) | |
| tree | bfe31942a4abbaac09ad0f4226effdcef8bf097e /firmware/rolo.c | |
| parent | 43d7a75369286dc3b39b858df34f66b0b45de34e (diff) | |
| download | rockbox-6a67707b5ec3b2c649c401550bb7fdef2b7c8d07.tar.gz rockbox-6a67707b5ec3b2c649c401550bb7fdef2b7c8d07.tar.bz2 rockbox-6a67707b5ec3b2c649c401550bb7fdef2b7c8d07.zip | |
Commit to certain names for cache coherency APIs and discard the aliases.
Wouldn't surprise me a bit to get some non-green.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31339 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/rolo.c')
| -rw-r--r-- | firmware/rolo.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/firmware/rolo.c b/firmware/rolo.c index 283779d7ee..3569746258 100644 --- a/firmware/rolo.c +++ b/firmware/rolo.c @@ -75,7 +75,7 @@ void rolo_restart_cop(void) COP_INT_DIS = -1; /* Invalidate cache */ - cpucache_invalidate(); + commit_discard_idcache(); /* Disable cache */ CACHE_CTL = CACHE_CTL_DISABLE; @@ -148,7 +148,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, CPU_INT_DIS = -1; /* Flush cache */ - cpucache_flush(); + commit_discard_idcache(); /* Disable cache */ CACHE_CTL = CACHE_CTL_DISABLE; @@ -174,10 +174,8 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, ); #elif defined(CPU_ARM) -#ifdef HAVE_CPUCACHE_INVALIDATE /* Flush and invalidate caches */ - cpucache_invalidate(); -#endif + commit_discard_idcache(); asm volatile( "bx %0 \n" : : "r"(dest) |