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authorDaniel Ankers <dan@weirdo.org.uk>2007-03-04 20:06:41 +0000
committerDaniel Ankers <dan@weirdo.org.uk>2007-03-04 20:06:41 +0000
commit82f9056988331572e01231d70fadc64b7ab76c6f (patch)
tree9f1d33b904516fd5eeac2067e4afb32ce5e990df /firmware/target/arm/crt0-pp.S
parent74e572c9d600247ee795b206da3715f6af442a25 (diff)
downloadrockbox-82f9056988331572e01231d70fadc64b7ab76c6f.tar.gz
rockbox-82f9056988331572e01231d70fadc64b7ab76c6f.zip
Dual core support for PP502x players (iPod G4 and later, iriver h10, Sansa - iPod G3 will be coming soon.) This allows threads to be run on either core provided that all communications between the cores is done using uncached memory. There should be no significant change in battery life from doing this. Documentation (on the RockboxKernel wiki page) will follow shortly.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12601 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/crt0-pp.S')
-rw-r--r--firmware/target/arm/crt0-pp.S17
1 files changed, 17 insertions, 0 deletions
diff --git a/firmware/target/arm/crt0-pp.S b/firmware/target/arm/crt0-pp.S
index e0d1034f74..bbeace1b60 100644
--- a/firmware/target/arm/crt0-pp.S
+++ b/firmware/target/arm/crt0-pp.S
@@ -222,6 +222,19 @@ cop_init:
strhi r4, [r2], #4
bhi 2b
+ /* Set up stack for IRQ mode */
+ msr cpsr_c, #0xd2
+ ldr sp, =cop_irq_stack
+ /* Set up stack for FIQ mode */
+ msr cpsr_c, #0xd1
+ ldr sp, =fiq_stack
+
+ /* Let abort and undefined modes use IRQ stack */
+ msr cpsr_c, #0xd7
+ ldr sp, =cop_irq_stack
+ msr cpsr_c, #0xdb
+ ldr sp, =cop_irq_stack
+
ldr sp, =cop_stackend
/* Run cop_main() in apps/main.c */
@@ -307,6 +320,10 @@ UIE:
.space 256*4
irq_stack:
+/* 256 words of COP IRQ stack */
+ .space 256*4
+cop_irq_stack:
+
/* 256 words of FIQ stack */
.space 256*4
fiq_stack: