imx233: generate register headers using headergen_v2 and update code for it

NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.

The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
  BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
  BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
  its equivalent for BF_WR(reg_SET, ...)

I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".

Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml

Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc

1 files changed, 10 insertions, 16 deletions

diff --git a/firmware/target/arm/imx233/ata-imx233.c b/firmware/target/arm/imx233/ata-imx233.c
index da546ab2a1..6abd486862 100644
--- a/firmware/target/arm/imx233/ata-imx233.c
+++ b/firmware/target/arm/imx233/ata-imx233.c
@@ -28,7 +28,7 @@
 #include "ata-target.h"
 #include "ata-defines.h"
 
-#include "regs/regs-gpmi.h"
+#include "regs/gpmi.h"
 
 struct pio_timing_t
 {
@@ -60,11 +60,8 @@ static uint16_t imx233_ata_read_reg(unsigned reg)
     imx233_ata_wait_ready();
 
     /* setup command */
-    HW_GPMI_CTRL0 = BF_OR6(GPMI_CTRL0, RUN(1),
-        COMMAND_MODE(BV_GPMI_CTRL0_COMMAND_MODE__READ),
-        WORD_LENGTH(BV_GPMI_CTRL0_WORD_LENGTH__16_BIT),
-        CS(IMX233_ATA_REG_CS(reg)), ADDRESS(IMX233_ATA_REG_ADDR(reg)),
-        XFER_COUNT(1));
+    BF_WR_ALL(GPMI_CTRL0, RUN(1), COMMAND_MODE_V(READ), WORD_LENGTH_V(16_BIT),
+        CS(IMX233_ATA_REG_CS(reg)), ADDRESS(IMX233_ATA_REG_ADDR(reg)), XFER_COUNT(1));
 
     /* wait for completion */
     while(BF_RD(GPMI_STAT, FIFO_EMPTY));
@@ -79,11 +76,8 @@ static void imx233_ata_write_reg(unsigned reg, uint16_t data)
     imx233_ata_wait_ready();
 
     /* setup command */
-    HW_GPMI_CTRL0 = BF_OR6(GPMI_CTRL0, RUN(1),
-        COMMAND_MODE(BV_GPMI_CTRL0_COMMAND_MODE__WRITE),
-        WORD_LENGTH(BV_GPMI_CTRL0_WORD_LENGTH__16_BIT),
-        CS(IMX233_ATA_REG_CS(reg)), ADDRESS(IMX233_ATA_REG_ADDR(reg)),
-        XFER_COUNT(1));
+    BF_WR_ALL(GPMI_CTRL0, RUN(1), COMMAND_MODE_V(WRITE), WORD_LENGTH_V(16_BIT),
+        CS(IMX233_ATA_REG_CS(reg)), ADDRESS(IMX233_ATA_REG_ADDR(reg)), XFER_COUNT(1));
 
     /* send data */
     HW_GPMI_DATA = data;
@@ -123,16 +117,16 @@ void ata_set_pio_timings(int mode)
     adjust_to_clock(t.data_setup);
     /* write */
     imx233_ata_wait_ready();
-    HW_GPMI_TIMING0 = BF_OR3(GPMI_TIMING0, ADDRESS_SETUP(t.addr_setup),
-        DATA_HOLD(t.data_hold), DATA_SETUP(t.data_setup));
+    BF_WR_ALL(GPMI_TIMING0, ADDRESS_SETUP(t.addr_setup), DATA_HOLD(t.data_hold),
+        DATA_SETUP(t.data_setup));
 }
 
 void ata_reset(void)
 {
     /* reset device */
-    BF_WR_V(GPMI_CTRL1, DEV_RESET, ENABLED);
+    BF_WR(GPMI_CTRL1, DEV_RESET_V(ENABLED));
     sleep(HZ / 10);
-    BF_WR_V(GPMI_CTRL1, DEV_RESET, DISABLED);
+    BF_WR(GPMI_CTRL1, DEV_RESET_V(DISABLED));
 }
 
 void ata_enable(bool on)
@@ -212,7 +206,7 @@ void ata_device_init(void)
     imx233_pinctrl_setup_vpin(VPIN_GPMI_RDn, "ata rd", PINCTRL_DRIVE_4mA, false);
     imx233_pinctrl_setup_vpin(VPIN_GPMI_WRn, "ata wr", PINCTRL_DRIVE_4mA, false);
     /* setup ata mode */
-    BF_WR_V(GPMI_CTRL1, GPMI_MODE, ATA);
+    BF_WR(GPMI_CTRL1, GPMI_MODE_V(ATA));
     /* reset device */
     ata_reset();
     ata_enable(true);