summaryrefslogtreecommitdiffstats
path: root/firmware/target/arm/imx233/clkctrl-imx233.c
diff options
context:
space:
mode:
authorAmaury Pouly <pamaury@rockbox.org>2011-05-01 13:02:46 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-05-01 13:02:46 +0000
commit08fb3f65745a237e2c1eae55d856ff27702246e5 (patch)
treea56ce11ac20e4df0e36de9195306c10b71752538 /firmware/target/arm/imx233/clkctrl-imx233.c
parentc0838cbfd8e45621fe3450aee1bf9458ff420d16 (diff)
downloadrockbox-08fb3f65745a237e2c1eae55d856ff27702246e5.tar.gz
rockbox-08fb3f65745a237e2c1eae55d856ff27702246e5.tar.bz2
rockbox-08fb3f65745a237e2c1eae55d856ff27702246e5.zip
Sansa Fuze+: initial commit (bootloader only, LCD basically working)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29808 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx233/clkctrl-imx233.c')
-rw-r--r--firmware/target/arm/imx233/clkctrl-imx233.c84
1 files changed, 84 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.c b/firmware/target/arm/imx233/clkctrl-imx233.c
new file mode 100644
index 0000000000..0b46a0e8db
--- /dev/null
+++ b/firmware/target/arm/imx233/clkctrl-imx233.c
@@ -0,0 +1,84 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright © 2011 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "clkctrl-imx233.h"
+
+#define __CLK_CLKGATE (1 << 31)
+#define __CLK_BUSY (1 << 29)
+
+void imx233_enable_timrot_xtal_clk32k(bool enable)
+{
+ if(enable)
+ __REG_CLR(HW_CLKCTRL_XTAL) = HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE;
+ else
+ __REG_SET(HW_CLKCTRL_XTAL) = HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE;
+}
+
+void imx233_enable_clock(enum imx233_clock_t clk, bool enable)
+{
+ volatile uint32_t *REG;
+ switch(clk)
+ {
+ case CLK_PIX: REG = &HW_CLKCTRL_PIX; break;
+ default: return;
+ }
+
+ /* warning: some registers like HW_CLKCTRL_PIX don't have a CLR/SET variant ! */
+ if(enable)
+ {
+ *REG = (*REG) & ~__CLK_CLKGATE;
+ while((*REG) & __CLK_CLKGATE);
+ while((*REG) & __CLK_BUSY);
+ }
+ else
+ {
+ *REG |= __CLK_CLKGATE;
+ while(!((*REG) & __CLK_CLKGATE));
+ }
+}
+
+void imx233_set_clock_divisor(enum imx233_clock_t clk, int div)
+{
+ switch(clk)
+ {
+ case CLK_PIX:
+ __REG_CLR(HW_CLKCTRL_PIX) = (1 << 12) - 1;
+ __REG_SET(HW_CLKCTRL_PIX) = div;
+ while(HW_CLKCTRL_PIX & __CLK_BUSY);
+ break;
+ default: return;
+ }
+}
+
+void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass)
+{
+ uint32_t msk;
+ switch(clk)
+ {
+ case CLK_PIX: msk = HW_CLKCTRL_CLKSEQ__BYPASS_PIX; break;
+ default: return;
+ }
+
+ if(bypass)
+ __REG_SET(HW_CLKCTRL_CLKSEQ) = msk;
+ else
+ __REG_CLR(HW_CLKCTRL_CLKSEQ) = msk;
+}
+