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authorAmaury Pouly <pamaury@rockbox.org>2011-06-30 17:31:40 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-06-30 17:31:40 +0000
commit617d1e9f6b7969aff5e45746b9c5e3cee9ce2c45 (patch)
treebf2015d298c2b6bc80189d09b73426380e08451f /firmware/target/arm/imx233/clkctrl-imx233.c
parent4a04c47a97517930b29f00b9d7f4d157cb69fa9b (diff)
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imx233/fuze+: ssp, dma, mmc now work properly, partially implement cpu frequency changing, implement panic waiting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30104 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx233/clkctrl-imx233.c')
-rw-r--r--firmware/target/arm/imx233/clkctrl-imx233.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.c b/firmware/target/arm/imx233/clkctrl-imx233.c
index 7701b84c41..ee77a77493 100644
--- a/firmware/target/arm/imx233/clkctrl-imx233.c
+++ b/firmware/target/arm/imx233/clkctrl-imx233.c
@@ -60,15 +60,25 @@ void imx233_set_clock_divisor(enum imx233_clock_t clk, int div)
switch(clk)
{
case CLK_PIX:
- __REG_CLR(HW_CLKCTRL_PIX) = (1 << 12) - 1;
+ __REG_CLR(HW_CLKCTRL_PIX) = HW_CLKCTRL_PIX__DIV_BM;
__REG_SET(HW_CLKCTRL_PIX) = div;
while(HW_CLKCTRL_PIX & __CLK_BUSY);
break;
case CLK_SSP:
- __REG_CLR(HW_CLKCTRL_SSP) = (1 << 9) - 1;
+ __REG_CLR(HW_CLKCTRL_SSP) = HW_CLKCTRL_SSP__DIV_BM;
__REG_SET(HW_CLKCTRL_SSP) = div;
while(HW_CLKCTRL_SSP & __CLK_BUSY);
break;
+ case CLK_CPU:
+ __REG_CLR(HW_CLKCTRL_CPU) = HW_CLKCTRL_CPU__DIV_CPU_BM;
+ __REG_SET(HW_CLKCTRL_CPU) = div;
+ while(HW_CLKCTRL_CPU & HW_CLKCTRL_CPU__BUSY_REF_CPU);
+ break;
+ case CLK_AHB:
+ __REG_CLR(HW_CLKCTRL_HBUS) = HW_CLKCTRL_HBUS__DIV_BM;
+ __REG_SET(HW_CLKCTRL_HBUS) = div;
+ while(HW_CLKCTRL_HBUS & __CLK_BUSY);
+ break;
default: return;
}
}
@@ -81,6 +91,7 @@ void imx233_set_fractional_divisor(enum imx233_clock_t clk, int fracdiv)
{
case CLK_PIX: REG = &HW_CLKCTRL_FRAC_PIX; break;
case CLK_IO: REG = &HW_CLKCTRL_FRAC_IO; break;
+ case CLK_CPU: REG = &HW_CLKCTRL_FRAC_CPU; break;
default: return;
}
@@ -97,6 +108,7 @@ void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass)
{
case CLK_PIX: msk = HW_CLKCTRL_CLKSEQ__BYPASS_PIX; break;
case CLK_SSP: msk = HW_CLKCTRL_CLKSEQ__BYPASS_SSP; break;
+ case CLK_CPU: msk = HW_CLKCTRL_CLKSEQ__BYPASS_CPU; break;
default: return;
}