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authorAmaury Pouly <amaury.pouly@gmail.com>2013-01-10 00:43:08 +0000
committerAmaury Pouly <amaury.pouly@gmail.com>2013-01-10 00:51:35 +0000
commit5aa19f3eeb4e401b2d1ac57131a87b87b6ce55d5 (patch)
treeae54a62a5a4420dff8ec5198f6f5c9418c34151f /firmware/target/arm/imx233/clkctrl-imx233.h
parentb9923df170104320e55bff05ecc2a0105067f9cb (diff)
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imx233: implement emi frequency scaling (disabled by default)
CPU frequency scaling is basically useless without scaling the memory frequency. On the i.MX233, the EMI (external memory interface) and DRAM blocks are responsable for the DDR settings. This commits implements emi frequency scaling. Only some settings are implemented and the timings values only apply to mDDR (extracted from Sigmatel linux port) and have been checked to work on the Fuze+ and Zen X-Fi2/3. This feature is still disabled by default but I expected some battery life savings by boosting higher to 454MHz and unboosting lower to 64MHz. Note that changing the emi frequency is particularly tricky and to avoid writing it entirely in assembly we rely on the compiler to not use the stack except in the prolog and epilog (because it's in dram which is disabled when doing the change) and to put constant pools in iram which should always be true if the compiler isn't completely dumb and since the code itself is put in iram. If this proves to be insufficient, one can always switch the stack to the irq stack since interrupts are disabled during the change. Change-Id: If6ef5357f7ff091130ca1063e48536c6028f23ba
Diffstat (limited to 'firmware/target/arm/imx233/clkctrl-imx233.h')
-rw-r--r--firmware/target/arm/imx233/clkctrl-imx233.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.h b/firmware/target/arm/imx233/clkctrl-imx233.h
index 665674108c..30c1c54545 100644
--- a/firmware/target/arm/imx233/clkctrl-imx233.h
+++ b/firmware/target/arm/imx233/clkctrl-imx233.h
@@ -81,6 +81,7 @@
#define HW_CLKCTRL_EMI__DIV_XTAL_BP 8
#define HW_CLKCTRL_EMI__DIV_XTAL_BM (0xf << 8)
#define HW_CLKCTRL_EMI__BUSY_REF_EMI (1 << 28)
+#define HW_CLKCTRL_EMI__BUSY_REF_XTAL (1 << 29)
#define HW_CLKCTRL_EMI__SYNC_MODE_EN (1 << 30)
#define HW_CLKCTRL_EMI__CLKGATE (1 << 31)