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author | Amaury Pouly <amaury.pouly@gmail.com> | 2016-05-24 20:29:56 +0100 |
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committer | Amaury Pouly <amaury.pouly@gmail.com> | 2016-05-28 16:49:22 +0200 |
commit | eac1ca22bd4a6c1849880d0f8b6764befb60bc21 (patch) | |
tree | 681da66d77b9edcb33b868cf94886440d61997cc /firmware/target/arm/imx233/icoll-imx233.c | |
parent | 28920ec5cc994dff19bec100a57de4557f72a7f5 (diff) | |
download | rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.tar.gz rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.tar.bz2 rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.zip |
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
Diffstat (limited to 'firmware/target/arm/imx233/icoll-imx233.c')
-rw-r--r-- | firmware/target/arm/imx233/icoll-imx233.c | 42 |
1 files changed, 28 insertions, 14 deletions
diff --git a/firmware/target/arm/imx233/icoll-imx233.c b/firmware/target/arm/imx233/icoll-imx233.c index 4e3c6fe864..3dff41394f 100644 --- a/firmware/target/arm/imx233/icoll-imx233.c +++ b/firmware/target/arm/imx233/icoll-imx233.c @@ -25,6 +25,20 @@ #include "string.h" #include "timrot-imx233.h" +#include "regs/icoll.h" + +/* helpers */ +#if IMX233_SUBTARGET >= 3600 && IMX233_SUBTARGET < 3780 +#define BP_ICOLL_PRIORITYn_ENABLEx(x) (2 + 8 * (x)) +#define BM_ICOLL_PRIORITYn_ENABLEx(x) (1 << (2 + 8 * (x))) +#define BP_ICOLL_PRIORITYn_PRIORITYx(x) (0 + 8 * (x)) +#define BM_ICOLL_PRIORITYn_PRIORITYx(x) (3 << (0 + 8 * (x))) +#define BF_ICOLL_PRIORITYn_PRIORITYx(x, v) (((v) << BP_ICOLL_PRIORITYn_PRIORITYx(x)) & BM_ICOLL_PRIORITYn_PRIORITYx(x)) +#define BFM_ICOLL_PRIORITYn_PRIORITYx(x, v) BM_ICOLL_PRIORITYn_PRIORITYx(x) +#define BP_ICOLL_PRIORITYn_SOFTIRQx(x) (3 + 8 * (x)) +#define BM_ICOLL_PRIORITYn_SOFTIRQx(x) (1 << (3 + 8 * (x))) +#endif + #define default_interrupt(name) \ extern __attribute__((weak, alias("UIRQ"))) void name(void) @@ -130,9 +144,9 @@ static uint32_t irq_count[INT_SRC_COUNT]; unsigned imx233_icoll_get_priority(int src) { #if IMX233_SUBTARGET < 3780 - return BF_RDn(ICOLL_PRIORITYn, src / 4, PRIORITYx(src % 4)); + return BF_RD(ICOLL_PRIORITYn(src / 4), PRIORITYx(src % 4)); #else - return BF_RDn(ICOLL_INTERRUPTn, src, PRIORITY); + return BF_RD(ICOLL_INTERRUPTn(src), PRIORITY); #endif } @@ -140,9 +154,9 @@ struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src) { struct imx233_icoll_irq_info_t info; #if IMX233_SUBTARGET < 3780 - info.enabled = BF_RDn(ICOLL_PRIORITYn, src / 4, ENABLEx(src % 4)); + info.enabled = BF_RD(ICOLL_PRIORITYn(src / 4), ENABLEx(src % 4)); #else - info.enabled = BF_RDn(ICOLL_INTERRUPTn, src, ENABLE); + info.enabled = BF_RD(ICOLL_INTERRUPTn(src), ENABLE); #endif info.priority = imx233_icoll_get_priority(src); info.freq = irq_count_old[src]; @@ -218,14 +232,14 @@ void imx233_icoll_force_irq(unsigned src, bool enable) { #if IMX233_SUBTARGET < 3780 if(enable) - BF_SETn(ICOLL_PRIORITYn, src / 4, SOFTIRQx(src % 4)); + BF_SET(ICOLL_PRIORITYn(src / 4), SOFTIRQx(src % 4)); else - BF_CLRn(ICOLL_PRIORITYn, src / 4, SOFTIRQx(src % 4)); + BF_CLR(ICOLL_PRIORITYn(src / 4), SOFTIRQx(src % 4)); #else if(enable) - BF_SETn(ICOLL_INTERRUPTn, src, SOFTIRQ); + BF_SET(ICOLL_INTERRUPTn(src), SOFTIRQ); else - BF_CLRn(ICOLL_INTERRUPTn, src, SOFTIRQ); + BF_CLR(ICOLL_INTERRUPTn(src), SOFTIRQ); #endif } @@ -233,23 +247,23 @@ void imx233_icoll_enable_interrupt(int src, bool enable) { #if IMX233_SUBTARGET < 3780 if(enable) - BF_SETn(ICOLL_PRIORITYn, src / 4, ENABLEx(src % 4)); + BF_SET(ICOLL_PRIORITYn(src / 4), ENABLEx(src % 4)); else - BF_CLRn(ICOLL_PRIORITYn, src / 4, ENABLEx(src % 4)); + BF_CLR(ICOLL_PRIORITYn(src / 4), ENABLEx(src % 4)); #else if(enable) - BF_SETn(ICOLL_INTERRUPTn, src, ENABLE); + BF_SET(ICOLL_INTERRUPTn(src), ENABLE); else - BF_CLRn(ICOLL_INTERRUPTn, src, ENABLE); + BF_CLR(ICOLL_INTERRUPTn(src), ENABLE); #endif } void imx233_icoll_set_priority(int src, unsigned prio) { #if IMX233_SUBTARGET < 3780 - BF_WRn(ICOLL_PRIORITYn, src / 4, PRIORITYx(src % 4), prio); + BF_WR(ICOLL_PRIORITYn(src / 4), PRIORITYx(src % 4, prio)); #else - BF_WRn(ICOLL_INTERRUPTn, src, PRIORITY, prio); + BF_WR(ICOLL_INTERRUPTn(src), PRIORITY(prio)); #endif } |