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authorAmaury Pouly <amaury.pouly@gmail.com>2013-01-12 18:58:19 +0000
committerAmaury Pouly <amaury.pouly@gmail.com>2013-01-12 18:58:19 +0000
commit0946a1e0f2c7c6491f87276cfadab5e9492313c6 (patch)
tree42a6b389fd3e444c9a4544ecd13bff8da50cbb62 /firmware/target/arm/imx233/lcdif-imx233.h
parent2ef7a549d57c984fee2cd26fbaa70bbfa054dfb4 (diff)
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imx233: enable underflow recovery in lcdif (needed for freq scale)
When chaging the cpu and memory frequency we need to disable the external memory interface (EMI) for a small time. This can underflow the dma and cause some breakage. Hopefully the SSP controller handles this gracefully by stopping the clock and the I2C probably handles this naturally because the clock can be streched anyway. However the LCDIF has a special setting for this which needs to be enable, otherwise it will send garbage to the LCD. No other block is known to suffer from this currently but this issue might have more unexpected consequences. Change-Id: Ide154cad87929f2bf6cc419ac1d2ff33e30eec66
Diffstat (limited to 'firmware/target/arm/imx233/lcdif-imx233.h')
-rw-r--r--firmware/target/arm/imx233/lcdif-imx233.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/lcdif-imx233.h b/firmware/target/arm/imx233/lcdif-imx233.h
index 3bce004259..9902aaa80b 100644
--- a/firmware/target/arm/imx233/lcdif-imx233.h
+++ b/firmware/target/arm/imx233/lcdif-imx233.h
@@ -53,6 +53,7 @@
#define HW_LCDIF_CTRL1__IRQ_BP 8
#define HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BM (0xf << 16)
#define HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BP 16
+#define HW_LCDIF_CTRL1__RECOVER_ON_UNDERFLOW (1 << 24)
#define HW_LCDIF__VSYNC_EDGE_IRQ 1
#define HW_LCDIF__CUR_FRAME_DONE_IRQ 2
@@ -84,6 +85,7 @@
#define HW_LCDIF_STAT__TXFIFO_EMPTY (1 << 26)
#define HW_LCDIF_STAT__BUSY (1 << 25)
+void imx233_lcdif_enable_underflow_recover(bool enable);
void imx233_lcdif_enable_bus_master(bool enable);
void imx233_lcdif_enable(bool enable);
void imx233_lcdif_reset(void);// reset lcdif block