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authorAmaury Pouly <pamaury@rockbox.org>2011-11-30 18:47:31 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-11-30 18:47:31 +0000
commita299212af31f2682e8f02d61177e3e26192ccbea (patch)
tree12a56335391ad66828be62ecf9188006b942ce4b /firmware/target/arm/imx233/power-imx233.h
parentc871076c2058b8f492c9665df536b75fd89f80bb (diff)
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imx233: add power debug screen
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31100 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx233/power-imx233.h')
-rw-r--r--firmware/target/arm/imx233/power-imx233.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/power-imx233.h b/firmware/target/arm/imx233/power-imx233.h
index 4d6edaf0e2..a546b96117 100644
--- a/firmware/target/arm/imx233/power-imx233.h
+++ b/firmware/target/arm/imx233/power-imx233.h
@@ -52,14 +52,40 @@
#define HW_POWER_VDDDCTRL__TRG_BM 0x1f
#define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */
#define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */
+#define HW_POWER_VDDDCTRL__ENABLE_LINREG (1 << 21)
#define HW_POWER_VDDACTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x50))
+#define HW_POWER_VDDACTRL__TRG_BP 0
+#define HW_POWER_VDDACTRL__TRG_BM 0x1f
+#define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */
+#define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */
+#define HW_POWER_VDDACTRL__ENABLE_LINREG (1 << 17)
#define HW_POWER_VDDIOCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x60))
+#define HW_POWER_VDDIOCTRL__TRG_BP 0
+#define HW_POWER_VDDIOCTRL__TRG_BM 0x1f
+#define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */
+#define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */
#define HW_POWER_VDDMEMCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x70))
+#define HW_POWER_VDDMEMCTRL__TRG_BP 0
+#define HW_POWER_VDDMEMCTRL__TRG_BM 0x1f
+#define HW_POWER_VDDMEMCTRL__TRG_STEP 50 /* mV */
+#define HW_POWER_VDDMEMCTRL__TRG_MIN 1700 /* mV */
+#define HW_POWER_VDDMEMCTRL__ENABLE_LINREG (1 << 8)
#define HW_POWER_MISC (*(volatile uint32_t *)(HW_POWER_BASE + 0x90))
+#define HW_POWER_MISC__SEL_PLLCLK 1
+#define HW_POWER_MISC__FREQSEL_BP 4
+#define HW_POWER_MISC__FREQSEL_BM (0x7 << 4)
+#define HW_POWER_MISC__FREQSEL__RES 0
+#define HW_POWER_MISC__FREQSEL__20MHz 1
+#define HW_POWER_MISC__FREQSEL__24MHz 2
+#define HW_POWER_MISC__FREQSEL__19p2MHz 3
+#define HW_POWER_MISC__FREQSEL__14p4MHz 4
+#define HW_POWER_MISC__FREQSEL__18MHz 5
+#define HW_POWER_MISC__FREQSEL__21p6MHz 6
+#define HW_POWER_MISC__FREQSEL__17p28MHz 7
#define HW_POWER_STS (*(volatile uint32_t *)(HW_POWER_BASE + 0xc0))
#define HW_POWER_STS__VBUSVALID (1 << 1)
@@ -74,4 +100,26 @@
#define HW_POWER_RESET__UNLOCK 0x3E770000
#define HW_POWER_RESET__PWD 0x1
+struct imx233_power_info_t
+{
+ int vddd; /* in mV */
+ bool vddd_linreg; /* VDDD source: linreg from VDDA or DC-DC */
+ int vdda; /* in mV */
+ bool vdda_linreg; /* VDDA source: linreg from VDDIO or DC-DC */
+ int vddio; /* in mV */
+ int vddmem; /* in mV */
+ bool vddmem_linreg; /* VDDMEM source: linreg from VDDIO or off */
+ bool dcdc_sel_pllclk; /* clock source of DC-DC: pll or 24MHz xtal */
+ int dcdc_freqsel;
+};
+
+#define POWER_INFO_VDDD (1 << 0)
+#define POWER_INFO_VDDA (1 << 1)
+#define POWER_INFO_VDDIO (1 << 2)
+#define POWER_INFO_VDDMEM (1 << 3)
+#define POWER_INFO_DCDC (1 << 4)
+#define POWER_INFO_ALL 0x1f
+
+struct imx233_power_info_t imx233_power_get_info(unsigned flags);
+
#endif /* __POWER_IMX233__ */