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authorAmaury Pouly <amaury.pouly@gmail.com>2012-05-19 13:16:17 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2012-05-19 16:10:51 +0200
commit553aeae9c63f789c969a954983e537244934903a (patch)
tree13a36bf8dc86d77b4ff5d7f6127b1df1c5c3e633 /firmware/target/arm/imx233/ssp-imx233.c
parent9022c69b646b43d7bd5ee2948f6abb9f51459aea (diff)
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imx233: fix clkctrl naming
Move to a more consistent naming convention like the other devices Change-Id: I4ddbbee27ee9f5ae775c5776592ec7ce02b30948
Diffstat (limited to 'firmware/target/arm/imx233/ssp-imx233.c')
-rw-r--r--firmware/target/arm/imx233/ssp-imx233.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/firmware/target/arm/imx233/ssp-imx233.c b/firmware/target/arm/imx233/ssp-imx233.c
index cbf537dd07..bdbde9ec93 100644
--- a/firmware/target/arm/imx233/ssp-imx233.c
+++ b/firmware/target/arm/imx233/ssp-imx233.c
@@ -106,11 +106,11 @@ void imx233_ssp_start(int ssp)
/** 2.3.1: the clk_ssp maximum frequency is 102.858 MHz */
/* fracdiv = 18 => clk_io = pll = 480Mhz
* intdiv = 5 => clk_ssp = 96Mhz */
- imx233_set_fractional_divisor(CLK_IO, 18);
- imx233_enable_clock(CLK_SSP, false);
- imx233_set_clock_divisor(CLK_SSP, 5);
- imx233_set_bypass_pll(CLK_SSP, false); /* use IO */
- imx233_enable_clock(CLK_SSP, true);
+ imx233_clkctrl_set_fractional_divisor(CLK_IO, 18);
+ imx233_clkctrl_enable_clock(CLK_SSP, false);
+ imx233_clkctrl_set_clock_divisor(CLK_SSP, 5);
+ imx233_clkctrl_set_bypass_pll(CLK_SSP, false); /* use IO */
+ imx233_clkctrl_enable_clock(CLK_SSP, true);
}
ssp_nr_in_use++;
}
@@ -128,8 +128,8 @@ void imx233_ssp_stop(int ssp)
ssp_nr_in_use--;
if(ssp_nr_in_use == 0)
{
- imx233_enable_clock(CLK_SSP, false);
- imx233_set_fractional_divisor(CLK_IO, 0);
+ imx233_clkctrl_enable_clock(CLK_SSP, false);
+ imx233_clkctrl_set_fractional_divisor(CLK_IO, 0);
}
}