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authorAmaury Pouly <pamaury@rockbox.org>2011-06-30 17:31:40 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-06-30 17:31:40 +0000
commit617d1e9f6b7969aff5e45746b9c5e3cee9ce2c45 (patch)
treebf2015d298c2b6bc80189d09b73426380e08451f /firmware/target/arm/imx233/ssp-imx233.h
parent4a04c47a97517930b29f00b9d7f4d157cb69fa9b (diff)
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imx233/fuze+: ssp, dma, mmc now work properly, partially implement cpu frequency changing, implement panic waiting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30104 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx233/ssp-imx233.h')
-rw-r--r--firmware/target/arm/imx233/ssp-imx233.h13
1 files changed, 8 insertions, 5 deletions
diff --git a/firmware/target/arm/imx233/ssp-imx233.h b/firmware/target/arm/imx233/ssp-imx233.h
index e9bdf62b27..c7c891ec0b 100644
--- a/firmware/target/arm/imx233/ssp-imx233.h
+++ b/firmware/target/arm/imx233/ssp-imx233.h
@@ -67,7 +67,7 @@
#define HW_SSP_CMD0__BLOCK_SIZE_BM (0xf << 16)
#define HW_SSP_CMD0__BLOCK_SIZE_BP 16
#define HW_SSP_CMD0__BLOCK_COUNT_BM (0xff << 8)
-#define HW_SSP_CMD0__BLOCK_COUNT_BP 16
+#define HW_SSP_CMD0__BLOCK_COUNT_BP 8
#define HW_SSP_CMD0__CMD_BM 0xff
#define HW_SSP_CMD1(ssp) (*(volatile uint32_t *)(HW_SSP_BASE(ssp) + 0x20))
@@ -147,12 +147,15 @@ void imx233_ssp_start(int ssp);
void imx233_ssp_stop(int ssp);
/* only softreset between start and stop or it might hang ! */
void imx233_ssp_softreset(int ssp);
-void imx233_ssp_set_timings(int ssp, int divide, int rate);
-void imx233_ssp_set_timeout(int ssp, int timeout);
+void imx233_ssp_set_timings(int ssp, int divide, int rate, int timeout);
void imx233_ssp_set_mode(int ssp, unsigned mode);
+void imx233_ssp_set_bus_width(int ssp, unsigned width);
+/* block_size uses the SSP format so it's actually the log_2 of the block_size */
+void imx233_ssp_set_block_size(int ssp, unsigned log_block_size);
/* SD/MMC facilities */
-enum imx233_ssp_error_t imx233_ssp_sd_mmc_transfer(int ssp, uint8_t cmd, uint32_t cmd_arg,
- enum imx233_ssp_resp_t resp, void *buffer, int xfer_size, bool read, uint32_t *resp_ptr);
+enum imx233_ssp_error_t imx233_ssp_sd_mmc_transfer(int ssp, uint8_t cmd,
+ uint32_t cmd_arg, enum imx233_ssp_resp_t resp, void *buffer, unsigned block_count,
+ bool wait4irq, bool read, uint32_t *resp_ptr);
void imx233_ssp_setup_ssp2_sd_mmc_pins(bool enable_pullups, unsigned bus_width,
unsigned drive_strength);
/* SD/MMC requires that the card be provided the clock during an init sequence of