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author | Amaury Pouly <amaury.pouly@gmail.com> | 2016-05-24 20:29:56 +0100 |
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committer | Amaury Pouly <amaury.pouly@gmail.com> | 2016-05-28 16:49:22 +0200 |
commit | eac1ca22bd4a6c1849880d0f8b6764befb60bc21 (patch) | |
tree | 681da66d77b9edcb33b868cf94886440d61997cc /firmware/target/arm/imx233/system-imx233.c | |
parent | 28920ec5cc994dff19bec100a57de4557f72a7f5 (diff) | |
download | rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.tar.gz rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.zip |
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
Diffstat (limited to 'firmware/target/arm/imx233/system-imx233.c')
-rw-r--r-- | firmware/target/arm/imx233/system-imx233.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c index 38865c47a3..666b9fedf4 100644 --- a/firmware/target/arm/imx233/system-imx233.c +++ b/firmware/target/arm/imx233/system-imx233.c @@ -45,6 +45,10 @@ #include "fmradio_i2c.h" #include "powermgmt-imx233.h" +#include "regs/digctl.h" +#include "regs/usbphy.h" +#include "regs/timrot.h" + #define WATCHDOG_HW_DELAY (10 * HZ) #define WATCHDOG_SW_DELAY (5 * HZ) @@ -99,7 +103,7 @@ void imx233_chip_reset(void) #if IMX233_SUBTARGET >= 3700 HW_CLKCTRL_RESET = BM_CLKCTRL_RESET_CHIP; #else - HW_POWER_RESET = BF_OR2(POWER_RESET, UNLOCK_V(KEY), RST_DIG(1)); + BF_WR_ALL(POWER_RESET, UNLOCK_V(KEY), RST_DIG(1)); #endif } @@ -243,10 +247,10 @@ void udelay(unsigned us) void imx233_digctl_set_arm_cache_timings(unsigned timings) { #if IMX233_SUBTARGET >= 3780 - HW_DIGCTL_ARMCACHE = BF_OR5(DIGCTL_ARMCACHE, ITAG_SS(timings), + BF_WR_ALL(DIGCTL_ARMCACHE, ITAG_SS(timings), DTAG_SS(timings), CACHE_SS(timings), DRTY_SS(timings), VALID_SS(timings)); #else - HW_DIGCTL_ARMCACHE = BF_OR3(DIGCTL_ARMCACHE, ITAG_SS(timings), + BF_WR_ALL(DIGCTL_ARMCACHE, ITAG_SS(timings), DTAG_SS(timings), CACHE_SS(timings)); #endif } |