diff options
author | Amaury Pouly <amaury.pouly@gmail.com> | 2016-05-24 20:29:56 +0100 |
---|---|---|
committer | Amaury Pouly <amaury.pouly@gmail.com> | 2016-05-28 16:49:22 +0200 |
commit | eac1ca22bd4a6c1849880d0f8b6764befb60bc21 (patch) | |
tree | 681da66d77b9edcb33b868cf94886440d61997cc /firmware/target/arm/imx233/uartdbg-imx233.c | |
parent | 28920ec5cc994dff19bec100a57de4557f72a7f5 (diff) | |
download | rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.tar.gz rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.zip |
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
Diffstat (limited to 'firmware/target/arm/imx233/uartdbg-imx233.c')
-rw-r--r-- | firmware/target/arm/imx233/uartdbg-imx233.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/firmware/target/arm/imx233/uartdbg-imx233.c b/firmware/target/arm/imx233/uartdbg-imx233.c index 077b405f49..e1cf533d3e 100644 --- a/firmware/target/arm/imx233/uartdbg-imx233.c +++ b/firmware/target/arm/imx233/uartdbg-imx233.c @@ -22,6 +22,8 @@ #include "pinctrl-imx233.h" #include "clkctrl-imx233.h" +#include "regs/uartdbg.h" + void imx233_uartdbg_init(unsigned long baud) { /* Enable UART clock */ @@ -35,20 +37,20 @@ void imx233_uartdbg_init(unsigned long baud) HW_UARTDBG_FBRD = baud & 0xFFFF; /* Set port options (actually needed to set baud rate), 8 bit char, enable FIFO buffer */ - BF_WR(UARTDBG_LCR_H, WLEN, 3); - BF_WR(UARTDBG_LCR_H, FEN, 1); + BF_WR(UARTDBG_LCR_H, WLEN(3)); + BF_WR(UARTDBG_LCR_H, FEN(1)); /* Finally enable UART device, TX enable, RX enable, device enable */ - BF_WR(UARTDBG_CR, TXE, 1); - BF_WR(UARTDBG_CR, RXE, 1); - BF_WR(UARTDBG_CR, UARTEN, 1); + BF_WR(UARTDBG_CR, TXE(1)); + BF_WR(UARTDBG_CR, RXE(1)); + BF_WR(UARTDBG_CR, UARTEN(1)); } void imx233_uartdbg_send(unsigned char data) { /* Wait to transmit if TX FIFO buffer is full*/ while (BF_RD(UARTDBG_FR, TXFF)); - BF_WR(UARTDBG_DR, DATA, data); + BF_WR(UARTDBG_DR, DATA(data)); } void uart_tx(const char* data) |