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| author | Rafaël Carré <rafael.carre@gmail.com> | 2008-12-04 20:04:31 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2008-12-04 20:04:31 +0000 |
| commit | 45711ac2869f955c40be96d8dcbc7201c718dba4 (patch) | |
| tree | ef022bec4b6e8bcc11005de34d300e073c60770d /firmware/target/arm/lcd-ssd1815.c | |
| parent | 7ea9e31658da4fce9c4a3e30838b82fda8eda287 (diff) | |
| download | rockbox-45711ac2869f955c40be96d8dcbc7201c718dba4.tar.gz rockbox-45711ac2869f955c40be96d8dcbc7201c718dba4.zip | |
Sansa AMS: centralize clock settings in clock-target.h
Reorder system_init() to initialize peripherals not only in bootloader
Use a 65MHz PCLK (and memclk) which will be needed for realtime decoding
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19330 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/lcd-ssd1815.c')
| -rw-r--r-- | firmware/target/arm/lcd-ssd1815.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/firmware/target/arm/lcd-ssd1815.c b/firmware/target/arm/lcd-ssd1815.c index 6bbad19ff8..35d8cf2275 100644 --- a/firmware/target/arm/lcd-ssd1815.c +++ b/firmware/target/arm/lcd-ssd1815.c @@ -71,6 +71,7 @@ #if CONFIG_CPU == AS3525 #include "as3525.h" +#include "clock-target.h" void lcd_write_command(int byte) { @@ -102,7 +103,7 @@ void lcd_write_data(const fb_data* p_bytes, int count) static inline void ams3525_dbop_init(void) { - CGU_DBOP |= (1<<3) /* clk enable */ | (3 - 1) /* clkdiv: 3 bits */ ; + CGU_DBOP |= (1<<3) | CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ); GPIOB_AFSEL = 0x0f; /* DBOP on pin 3:0 */ GPIOC_AFSEL = 0xff; /* DBOP on pins 7:0 */ |