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authorMichael Sevakis <jethead71@rockbox.org>2008-12-12 11:01:07 +0000
committerMichael Sevakis <jethead71@rockbox.org>2008-12-12 11:01:07 +0000
commite69d567d9ebf7d236ff9663b11ac396cc71dcd75 (patch)
tree093b9d1bc979d79be1fcd0daac1d8daf8ac55503 /firmware/target/arm/s3c2440/gigabeat-fx
parent0ad97d13fc52b28de566dc0ddaf7245583eec2cc (diff)
downloadrockbox-e69d567d9ebf7d236ff9663b11ac396cc71dcd75.tar.gz
rockbox-e69d567d9ebf7d236ff9663b11ac396cc71dcd75.zip
Bring consistency to pcm implementation and samplerate handling. Less low-level duplication. A small test_sampr fix so it works on coldfire again.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19400 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx')
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c59
1 files changed, 6 insertions, 53 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
index 14fbcd5cfe..315fc3bf0f 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
@@ -26,12 +26,6 @@
#include "sound.h"
#include "file.h"
-/* All exact rates for 16.9344MHz clock */
-#define GIGABEAT_11025HZ (0x19 << 1)
-#define GIGABEAT_22050HZ (0x1b << 1)
-#define GIGABEAT_44100HZ (0x11 << 1)
-#define GIGABEAT_88200HZ (0x1f << 1)
-
/* PCM interrupt routine lockout */
static struct
{
@@ -43,11 +37,6 @@ static struct
.state = 0,
};
-/* Last samplerate set by pcm_set_frequency */
-static unsigned long pcm_freq = 0; /* 44.1 is default */
-/* Samplerate control for audio codec */
-static int sr_ctrl = 0;
-
#define FIFO_COUNT ((IISFCON >> 6) & 0x3F)
/* Setup for the DMA controller */
@@ -57,22 +46,6 @@ static int sr_ctrl = 0;
/* Get more data from the callback and top off the FIFO */
void fiq_handler(void) __attribute__((interrupt ("FIQ")));
-static void _pcm_apply_settings(void)
-{
- if (pcm_freq != pcm_curr_sampr)
- {
- pcm_curr_sampr = pcm_freq;
- audiohw_set_frequency(sr_ctrl);
- }
-}
-
-void pcm_apply_settings(void)
-{
- int status = disable_fiq_save();
- _pcm_apply_settings();
- restore_fiq(status);
-}
-
/* Mask the DMA interrupt */
void pcm_play_lock(void)
{
@@ -89,8 +62,6 @@ void pcm_play_unlock(void)
void pcm_play_dma_init(void)
{
- pcm_set_frequency(SAMPR_44);
-
/* There seem to be problems when changing the IIS interface configuration
* when a clock is not present.
*/
@@ -128,13 +99,18 @@ void pcm_postinit(void)
pcm_apply_settings();
}
+void pcm_dma_apply_settings(void)
+{
+ audiohw_set_frequency(pcm_fsel);
+}
+
/* Connect the DMA and start filling the FIFO */
static void play_start_pcm(void)
{
/* clear pending DMA interrupt */
SRCPND = DMA2_MASK;
- _pcm_apply_settings();
+ pcm_apply_settings();
/* Flush any pending writes */
clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2);
@@ -272,29 +248,6 @@ void fiq_handler(void)
}
}
-void pcm_set_frequency(unsigned int frequency)
-{
- switch(frequency)
- {
- case SAMPR_11:
- sr_ctrl = GIGABEAT_11025HZ;
- break;
- case SAMPR_22:
- sr_ctrl = GIGABEAT_22050HZ;
- break;
- default:
- frequency = SAMPR_44;
- case SAMPR_44:
- sr_ctrl = GIGABEAT_44100HZ;
- break;
- case SAMPR_88:
- sr_ctrl = GIGABEAT_88200HZ;
- break;
- }
-
- pcm_freq = frequency;
-}
-
size_t pcm_get_bytes_waiting(void)
{
/* lie a little and only return full pairs */