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authorCástor Muñoz <cmvidal@gmail.com>2016-02-05 02:02:02 +0100
committerCástor Muñoz <cmvidal@gmail.com>2017-02-09 20:47:16 +0100
commit882921efb64218e9b8cc3a7d9c7308734f9b12f3 (patch)
treefca2e1b77104419156a07c6b6d80fa7af9fa3969 /firmware/target/arm/s5l8702/boot.lds
parent0d0b163dd15c35a427c8bb2bbd7b906afe9c491d (diff)
downloadrockbox-bootloader_ipod6g_v1.tar.gz
rockbox-bootloader_ipod6g_v1.zip
ipod6g: bootloader v1bootloader_ipod6g_v1
- dual boot - USB mode - battery trap Change-Id: I8586cfeb21ee63f45ab965430725225fdfc4212d
Diffstat (limited to 'firmware/target/arm/s5l8702/boot.lds')
-rw-r--r--firmware/target/arm/s5l8702/boot.lds54
1 files changed, 41 insertions, 13 deletions
diff --git a/firmware/target/arm/s5l8702/boot.lds b/firmware/target/arm/s5l8702/boot.lds
index 2885f77eda..61f23b9c22 100644
--- a/firmware/target/arm/s5l8702/boot.lds
+++ b/firmware/target/arm/s5l8702/boot.lds
@@ -1,5 +1,6 @@
#define ASM
#include "config.h"
+#include "cpu.h"
ENTRY(start)
#ifdef ROCKBOX_LITTLE_ENDIAN
@@ -10,13 +11,11 @@ OUTPUT_FORMAT(elf32-bigarm)
OUTPUT_ARCH(arm)
STARTUP(target/arm/s5l8702/crt0.o)
+#define MAX_LOADSIZE 8M /* reserved for loading Rockbox binary */
+
#ifdef IPOD_NANO2G
#define DRAMORIG 0x08000000 + ((MEMORYSIZE - 1) * 0x100000)
#define DRAMSIZE 0x00100000
-#else
-#define DRAMORIG 0x08000000
-#define DRAMSIZE (DRAM_SIZE - TTB_SIZE)
-#endif
#define IRAMORIG 0x22000000
#define IRAMSIZE 256K
@@ -26,17 +25,47 @@ MEMORY
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
}
-
#define LOAD_AREA IRAM
+#define VECT_AREA IRAM
+#define BSS_AREA DRAM
+
+#elif defined(IPOD_6G)
+MEMORY
+{
+ DRAM : ORIGIN = DRAM_ORIG, LENGTH = DRAM_SIZE
+ IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE
+
+ /* s5l8702 maps address 0 to ROM, IRAM or DRAM */
+ VECT_AREA : ORIGIN = 0, LENGTH = 1K
+
+ /* IRAM region where loaded IM3 body will be moved and executed,
+ preserving the loaded IM3 header (0x800 bytes) at IRAM1_ORIG */
+ MOVE_AREA : ORIGIN = IRAM1_ORIG + 0x800,
+ LENGTH = IRAM1_SIZE - 0x800
+
+ /* DRAM region for BSS */
+ BSS_AREA : ORIGIN = DRAM_ORIG + MAX_LOADSIZE,
+ LENGTH = DRAM_SIZE - MAX_LOADSIZE - TTB_SIZE
+}
+#define LOAD_AREA MOVE_AREA
+
+#else
+#error No target defined!
+#endif
+
SECTIONS
{
+ _dfuloadaddr = IRAM0_ORIG ;
+ _movestart = LOADADDR(.text) ;
+ _moveend = LOADADDR(.data) + SIZEOF(.data) ;
+
#ifdef NEEDS_INTVECT_COPYING
.intvect : {
_intvectstart = . ;
*(.intvect)
- _intvectend = _newstart ;
- } >IRAM AT> LOAD_AREA
+ _intvectend = _newstart ;
+ } >VECT_AREA AT> LOAD_AREA
_intvectcopy = LOADADDR(.intvect) ;
#endif
@@ -61,10 +90,9 @@ SECTIONS
*(.idata*)
*(.data*)
*(.ncdata*);
- . = ALIGN(0x4);
+ . = ALIGN(0x20); /* align move size */
_dataend = . ;
- } > IRAM AT> LOAD_AREA
- _datacopy = LOADADDR(.data) ;
+ } > LOAD_AREA
.stack (NOLOAD) :
{
@@ -80,7 +108,7 @@ SECTIONS
_fiqstackbegin = .;
. += 0x400;
_fiqstackend = .;
- } > IRAM
+ } > LOAD_AREA
.bss (NOLOAD) : {
_edata = .;
@@ -88,7 +116,7 @@ SECTIONS
*(.ibss*);
*(.ncbss*);
*(COMMON);
- . = ALIGN(0x4);
+ . = ALIGN(0x20); /* align bzero size */
_end = .;
- } > IRAM
+ } > BSS_AREA
}