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authorMichael Sevakis <jethead71@rockbox.org>2007-09-29 06:17:33 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-09-29 06:17:33 +0000
commitda55251a35d8ad6c0b8b9e62904798212caba46f (patch)
treeb629e5316ce26624d3307587e32985c18403ec27 /firmware/target/arm/system-target.h
parentaaf3e3269c9d1e3dc41255c9be5f47aba8acb515 (diff)
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Compile Portal Player bootloaders as single core. Cleanup the startup code for bootloaders. Remove cop stack entirely and keep IRAM use down on all relevant targets - just use the 128-byte idle stack. Use the inline asm version of current_core for pp5002 as well.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14898 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/system-target.h')
-rw-r--r--firmware/target/arm/system-target.h13
1 files changed, 6 insertions, 7 deletions
diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h
index 6dc317e427..ed8d90c627 100644
--- a/firmware/target/arm/system-target.h
+++ b/firmware/target/arm/system-target.h
@@ -52,7 +52,6 @@ static inline void udelay(unsigned usecs)
while (TIME_BEFORE(USEC_TIMER, stop));
}
-#ifdef CPU_PP502x
static inline unsigned int current_core(void)
{
/*
@@ -63,14 +62,16 @@ static inline unsigned int current_core(void)
*/
unsigned int core;
asm volatile (
- "mov %0, #0x60000000 \r\n" /* PROCESSOR_ID */
- "ldrb %0, [%0] \r\n" /* Just load the LSB */
- "mov %0, %0, lsr #7 \r\n" /* Bit 7 => index */
- : "=&r"(core) /* CPU=0, COP=1 */
+ "ldrb %0, [%1] \n" /* Just load the LSB */
+ "mov %0, %0, lsr #7 \n" /* Bit 7 => index */
+ : "=r"(core) /* CPU=0, COP=1 */
+ : "r"(&PROCESSOR_ID)
);
return core;
}
+#ifdef CPU_PP502x
+
#ifndef BOOTLOADER
#define CACHE_FUNCTIONS_AS_CALL
@@ -81,8 +82,6 @@ void invalidate_icache(void);
void flush_icache(void);
#endif
-#else
-unsigned int current_core(void);
#endif /* CPU_PP502x */