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authorRafaël Carré <rafael.carre@gmail.com>2010-01-24 15:04:21 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-01-24 15:04:21 +0000
commitb2323be33b5a89cc244d4488b21263a359aced96 (patch)
tree112b2df776d9e4ca404237c176f56433a4136471 /firmware/target/arm/tcc77x
parentfd13e09c4f79f9a26c76c160b007513cacc8b818 (diff)
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ARM: lr addresses the next instruction after the failing one in undefined instruction vector
Substract 4 before passing the argument to UIE so the correct address is displayed git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24321 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tcc77x')
-rw-r--r--firmware/target/arm/tcc77x/crt0.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/tcc77x/crt0.S b/firmware/target/arm/tcc77x/crt0.S
index 2c5af3f21b..16b80920f4 100644
--- a/firmware/target/arm/tcc77x/crt0.S
+++ b/firmware/target/arm/tcc77x/crt0.S
@@ -218,7 +218,7 @@ vectors_end:
in UIE.
*/
undef_instr_handler:
- mov r0, lr
+ sub r0, lr, #4
mov r1, #0
b UIE