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authorMarcoen Hirschberg <marcoen@gmail.com>2008-03-27 23:58:03 +0000
committerMarcoen Hirschberg <marcoen@gmail.com>2008-03-27 23:58:03 +0000
commit82c52302bdc664fdcb177811c65c2891d53ef73a (patch)
tree0e84d262d97cc3a3b9e9983780d51cc3c18eb0db /firmware/target/arm/tms320dm320/boot.lds
parent8406d92475024bec99a99371c3a8c4b243ff2015 (diff)
downloadrockbox-82c52302bdc664fdcb177811c65c2891d53ef73a.tar.gz
rockbox-82c52302bdc664fdcb177811c65c2891d53ef73a.zip
split boot.lds and move it into the target tree
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16855 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320/boot.lds')
-rw-r--r--firmware/target/arm/tms320dm320/boot.lds87
1 files changed, 87 insertions, 0 deletions
diff --git a/firmware/target/arm/tms320dm320/boot.lds b/firmware/target/arm/tms320dm320/boot.lds
new file mode 100644
index 0000000000..8fb40ae135
--- /dev/null
+++ b/firmware/target/arm/tms320dm320/boot.lds
@@ -0,0 +1,87 @@
+#include "config.h"
+
+ENTRY(start)
+OUTPUT_FORMAT(elf32-littlearm)
+OUTPUT_ARCH(arm)
+INPUT(target/arm/tms320dm320/crt0.o)
+
+#define DRAMSIZE (MEMORYSIZE * 0x100000)
+
+#define DRAMORIG 0x00900000
+#define IRAMORIG 0x00000000
+#define IRAMSIZE 16K
+#define FLASHORIG 0x00100000
+#define FLASHSIZE 8M
+
+MEMORY
+{
+ DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
+ IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
+ FLASH : ORIGIN = FLASHORIG, LENGTH = FLASHSIZE
+}
+
+SECTIONS
+{
+ . = DRAMORIG + 0x1000000;
+
+ .text : {
+ loadaddress = .;
+ _loadaddress = .;
+ *(.init.text)
+ *(.text*)
+ *(.glue_7)
+ *(.glue_7t)
+ . = ALIGN(0x4);
+ } > DRAM
+
+ .rodata :
+ {
+ *(.rodata) /* problems without this, dunno why */
+ *(.rodata*)
+ *(.rodata.str1.1)
+ *(.rodata.str1.4)
+ . = ALIGN(0x4);
+
+ /* Pseudo-allocate the copies of the data sections */
+ _datacopy = .;
+ } > DRAM
+
+ .data : {
+ *(.icode)
+ *(.irodata)
+ *(.idata)
+ *(.data*)
+ . = ALIGN(0x4);
+ _dataend = . ;
+ } > DRAM
+
+ .stack :
+ {
+ *(.stack)
+ _stackbegin = .;
+ stackbegin = .;
+ . += 0x2000;
+ _stackend = .;
+ stackend = .;
+ } > DRAM
+
+ .bss :
+ {
+ _edata = .;
+ *(.bss*);
+ *(.ibss);
+ *(COMMON)
+ _end = .;
+ } > DRAM
+
+ .vectors IRAMORIG :
+ {
+ _vectorsstart = .;
+ KEEP(*(.resetvectors));
+ *(.resetvectors);
+ KEEP(*(.vectors));
+ *(.vectors);
+ _vectorsend = .;
+ } AT > DRAM
+ _vectorscopy = LOADADDR(.vectors);
+}