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authorKarl Kurbjun <kkurbjun@gmail.com>2009-03-11 01:18:23 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2009-03-11 01:18:23 +0000
commit3c7ada594142b44bfb543f7ec693ac7250176287 (patch)
treea0a6cc746d5810c2e44643b627d5a181ad9acbdc /firmware/target/arm/tms320dm320/dsp/dma.c
parent2d9caa9aa3aeebed58772eb6ed4b2f4aed85abf6 (diff)
downloadrockbox-3c7ada594142b44bfb543f7ec693ac7250176287.tar.gz
rockbox-3c7ada594142b44bfb543f7ec693ac7250176287.zip
Sound working with rockbox PCM interface on the M:Robe 500. Doom and Rockboy run with sound. There are stability problems that need to be looked into causing the player to reset when music playback is attempted.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20284 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320/dsp/dma.c')
-rw-r--r--firmware/target/arm/tms320dm320/dsp/dma.c70
1 files changed, 37 insertions, 33 deletions
diff --git a/firmware/target/arm/tms320dm320/dsp/dma.c b/firmware/target/arm/tms320dm320/dsp/dma.c
index 62c108ec6f..cf1e324a1f 100644
--- a/firmware/target/arm/tms320dm320/dsp/dma.c
+++ b/firmware/target/arm/tms320dm320/dsp/dma.c
@@ -54,6 +54,7 @@ unsigned short last_size;
/* This tells us which half of the DSP buffer (data) is free */
unsigned short dma0_unlocked;
+int waiting=0;
/* rebuffer sets up the next SDRAM to SARAM transfer and tells the ARM when it
* is done with a buffer.
*/
@@ -76,45 +77,49 @@ void rebuffer(void)
sdem_level=0;
/* Get a new buffer (location and size) from ARM */
- status.msg = MSG_REFILL;
- int_arm();
+ status.msg = MSG_REFILL;
+ waiting=1;
+ startack();
}
-
- /* Size is in bytes (but forced 32 bit transfers */
- if( (dsp_level + (sdem_dsp_size - sdem_level) ) > DSP_BUFFER_SIZE)
- {
- last_size = DSP_BUFFER_SIZE-dsp_level;
- }
- else
+
+ if(!waiting)
{
- last_size = sdem_dsp_size-sdem_level;
- }
+ /* Size is in bytes (but forced 32 bit transfers */
+ if( (dsp_level + (sdem_dsp_size - sdem_level) ) > DSP_BUFFER_SIZE)
+ {
+ last_size = DSP_BUFFER_SIZE-dsp_level;
+ }
+ else
+ {
+ last_size = sdem_dsp_size-sdem_level;
+ }
- /* DSP addresses are 16 bit (word) */
- DSP_ADDRL = (unsigned short)data + (dma0_unlocked >> 1) + (dsp_level>>1);
- DSP_ADDRH = 0;
+ /* DSP addresses are 16 bit (word) */
+ DSP_ADDRL = (unsigned short)data + (dma0_unlocked >> 1) + (dsp_level>>1);
+ DSP_ADDRH = 0;
- /* SDRAM addresses are 8 bit (byte)
- * Warning: These addresses are forced to 32 bit alignment!
- */
- sdem_addr = ((unsigned long)sdem_addrh << 16 | sdem_addrl) + sdem_level;
- SDEM_ADDRL = sdem_addr & 0xffff;
- SDEM_ADDRH = sdem_addr >> 16;
+ /* SDRAM addresses are 8 bit (byte)
+ * Warning: These addresses are forced to 32 bit alignment!
+ */
+ sdem_addr = ((unsigned long)sdem_addrh << 16 | sdem_addrl) + sdem_level;
+ SDEM_ADDRL = sdem_addr & 0xffff;
+ SDEM_ADDRH = sdem_addr >> 16;
- /* Set the size of the SDRAM to SARAM transfer (demac transfer) */
- DMA_SIZE = last_size;
+ /* Set the size of the SDRAM to SARAM transfer (demac transfer) */
+ DMA_SIZE = last_size;
- DMA_CTRL = 0;
+ DMA_CTRL = 0;
- /* These are just debug signals that are not used/needed right now */
- status.payload.refill._DMA_TRG = DMA_TRG;
- status.payload.refill._SDEM_ADDRH = SDEM_ADDRH;
- status.payload.refill._SDEM_ADDRL = SDEM_ADDRL;
- status.payload.refill._DSP_ADDRH = DSP_ADDRH;
- status.payload.refill._DSP_ADDRL = DSP_ADDRL;
+ /* These are just debug signals that are not used/needed right now */
+ status.payload.refill._DMA_TRG = DMA_TRG;
+ status.payload.refill._SDEM_ADDRH = SDEM_ADDRH;
+ status.payload.refill._SDEM_ADDRL = SDEM_ADDRL;
+ status.payload.refill._DSP_ADDRH = DSP_ADDRH;
+ status.payload.refill._DSP_ADDRL = DSP_ADDRL;
- /* Start the demac transfer */
- DMA_TRG = 1;
+ /* Start the demac transfer */
+ DMA_TRG = 1;
+ }
}
/* This interupt handler is for the SARAM (on DSP) to McBSP IIS DMA transfer.
@@ -146,8 +151,7 @@ interrupt void handle_dma0(void)
* (dsp_level), the SDRAM buffer level (sdem_level) and to rebuffer if the dsp
* buffer is not full.
*/
-interrupt void handle_dmac(void) {
- unsigned long sdem_addr;
+interrupt void handle_dmac(void) {
IFR = 1 << 11;
dsp_level+=last_size;