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authorTomasz Moń <desowin@gmail.com>2021-06-24 14:00:19 +0200
committerTomasz Moń <desowin@gmail.com>2021-06-25 14:10:15 +0000
commit635ec5bbbd00bd5b6c0eff7fc459155cd84d5fe1 (patch)
tree6a409a78826c63cf6a61fbaa7552fcd4b0aaec2e /firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
parentb972fe4cdf43abbe4bfd850f3df86fbeec93194c (diff)
downloadrockbox-635ec5bbbd00bd5b6c0eff7fc459155cd84d5fe1.tar.gz
rockbox-635ec5bbbd00bd5b6c0eff7fc459155cd84d5fe1.zip
Sansa Connect: Manually drive SPI Slave Select
Keep Slave Select active during command transmission. This relaxes timing requirements on the AVR side. Change-Id: Ia1a6cf45aba3c11f6aeaa7441c6793807ca827f0
Diffstat (limited to 'firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c')
-rw-r--r--firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
index 2a71563c0b..ca76100e8b 100644
--- a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
+++ b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
@@ -333,6 +333,18 @@ static uint8_t spi_read_byte(void)
return rxdata & 0xFF;
}
+static void avr_hid_select(void)
+{
+ /* Drive GIO29 (AVR SS) low */
+ IO_GIO_BITCLR1 = (1 << 13);
+}
+
+static void avr_hid_release(void)
+{
+ /* Drive GIO29 (AVR SS) high */
+ IO_GIO_BITSET1 = (1 << 13);
+}
+
static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length)
{
bool success = true;
@@ -351,6 +363,8 @@ static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length)
bitset16(&IO_CLK_MOD2, CLK_MOD2_SIF1);
IO_SERIAL1_TX_ENABLE = 0x0001;
+ avr_hid_select();
+
IO_SERIAL1_TX_DATA = CMD_SYNC;
spi_read_byte();
/* Allow AVR to process CMD_SYNC */
@@ -393,6 +407,8 @@ static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length)
success = success && (rx == CMD_CLOSE);
}
+ avr_hid_release();
+
IO_SERIAL1_TX_ENABLE = 0;
bitclr16(&IO_CLK_MOD2, CLK_MOD2_SIF1);
@@ -428,16 +444,17 @@ void avr_hid_init(void)
{
/*
setup alternate GIO functions:
- GIO29 - SIF1 Enable (Directly connected to AVR's SS)
GIO30 - SIF1 Clock
GIO31 - SIF1 Data In
GIO32 - SIF1 Data Out
+ Manually drive GIO29 output (directly connected to AVR's SS).
*/
- IO_GIO_FSEL2 = (IO_GIO_FSEL2 & 0x00FF) | 0xAA00;
+ IO_GIO_FSEL2 = (IO_GIO_FSEL2 & 0x00FF) | 0xA800;
/* GIO29, GIO30 - outputs, GIO31 - input */
IO_GIO_DIR1 = (IO_GIO_DIR1 & ~((1 << 13) | (1 << 14))) | (1 << 15);
/* GIO32 - output */
bitclr16(&IO_GIO_DIR2, (1 << 0));
+ avr_hid_release();
/* RATE = 219 (0xDB) -> 200 kHz */
IO_SERIAL1_MODE = 0x6DB;