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authorMichael Sparmann <theseven@rockbox.org>2009-10-11 13:48:12 +0000
committerMichael Sparmann <theseven@rockbox.org>2009-10-11 13:48:12 +0000
commit3b549fedbb1647bd6c8f010ff385e9aa27e538e3 (patch)
tree56fe54c907cead3208b1d8cc04967348037fac7f /firmware/target/arm
parente13c6001332882291363bdf2f1155875439fe187 (diff)
downloadrockbox-3b549fedbb1647bd6c8f010ff385e9aa27e538e3.tar.gz
rockbox-3b549fedbb1647bd6c8f010ff385e9aa27e538e3.zip
iPod Nano 2G: Reset NAND banks after powering the chip up.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23110 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/s5l8700/ipodnano2g/nand-nano2g.c80
1 files changed, 41 insertions, 39 deletions
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/nand-nano2g.c b/firmware/target/arm/s5l8700/ipodnano2g/nand-nano2g.c
index fe59fc5d2d..6289fbc66f 100644
--- a/firmware/target/arm/s5l8700/ipodnano2g/nand-nano2g.c
+++ b/firmware/target/arm/s5l8700/ipodnano2g/nand-nano2g.c
@@ -128,45 +128,6 @@ uint32_t nand_timeout(long timeout)
}
}
-void nand_power_up(void)
-{
- unsigned char powerup[2] = {0x15, 1};
- mutex_lock(&ecc_mtx);
- PWRCONEXT &= ~0x40;
- PWRCON &= ~0x100000;
- PCON2 = 0x33333333;
- PDAT2 = 0;
- PCON3 = 0x11113333;
- PDAT3 = 0;
- PCON4 = 0x33333333;
- PDAT4 = 0;
- PCON5 = (PCON5 & ~0xF) | 3;
- PUNK5 = 1;
- pmu_write_multiple(0x35, 2, powerup);
- sleep(HZ / 50);
- nand_powered = 1;
- mutex_unlock(&ecc_mtx);
-}
-
-void nand_power_down(void)
-{
- unsigned char powerdown[2] = {0x15, 0};
- mutex_lock(&ecc_mtx);
- pmu_write_multiple(0x35, 2, powerdown);
- PCON2 = 0x11111111;
- PDAT2 = 0;
- PCON3 = 0x11111111;
- PDAT3 = 0;
- PCON4 = 0x11111111;
- PDAT4 = 0;
- PCON5 = (PCON5 & ~0xF) | 1;
- PUNK5 = 1;
- PWRCONEXT |= 0x40;
- PWRCON |= 0x100000;
- nand_powered = 0;
- mutex_unlock(&ecc_mtx);
-}
-
uint32_t nand_wait_rbbdone(void)
{
long timeout = current_tick + HZ / 50;
@@ -338,6 +299,47 @@ uint32_t nand_get_chip_type(uint32_t bank)
return nand_unlock(result);
}
+void nand_power_up(void)
+{
+ unsigned char powerup[2] = {0x15, 1};
+ uint32_t i;
+ mutex_lock(&ecc_mtx);
+ PWRCONEXT &= ~0x40;
+ PWRCON &= ~0x100000;
+ PCON2 = 0x33333333;
+ PDAT2 = 0;
+ PCON3 = 0x11113333;
+ PDAT3 = 0;
+ PCON4 = 0x33333333;
+ PDAT4 = 0;
+ PCON5 = (PCON5 & ~0xF) | 3;
+ PUNK5 = 1;
+ pmu_write_multiple(0x35, 2, powerup);
+ sleep(HZ / 50);
+ for (i = 0; i < 4; i++) nand_reset(i);
+ nand_powered = 1;
+ mutex_unlock(&ecc_mtx);
+}
+
+void nand_power_down(void)
+{
+ unsigned char powerdown[2] = {0x15, 0};
+ mutex_lock(&ecc_mtx);
+ pmu_write_multiple(0x35, 2, powerdown);
+ PCON2 = 0x11111111;
+ PDAT2 = 0;
+ PCON3 = 0x11111111;
+ PDAT3 = 0;
+ PCON4 = 0x11111111;
+ PDAT4 = 0;
+ PCON5 = (PCON5 & ~0xF) | 1;
+ PUNK5 = 1;
+ PWRCONEXT |= 0x40;
+ PWRCON |= 0x100000;
+ nand_powered = 0;
+ mutex_unlock(&ecc_mtx);
+}
+
uint32_t nand_read_page(uint32_t bank, uint32_t page, void* databuffer,
void* sparebuffer, uint32_t doecc,
uint32_t checkempty)