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authorMichael Sparmann <theseven@rockbox.org>2010-12-12 00:52:02 +0000
committerMichael Sparmann <theseven@rockbox.org>2010-12-12 00:52:02 +0000
commit70447b529cbbe023d45fd50a62b8ffedae8bff9b (patch)
tree8adeb27747d5261474171dccc7fe81c1994d5c02 /firmware/target/arm
parent8e1021bd4c048f793ae5593a08d81e0994b5aba1 (diff)
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usb-s3c6400x.[ch], button-clickwheel.c: Move s5l8701-specific parts to where they belong, prepare for s5l8702
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28800 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/ipod/button-clickwheel.c42
-rw-r--r--firmware/target/arm/usb-s3c6400x.c43
2 files changed, 56 insertions, 29 deletions
diff --git a/firmware/target/arm/ipod/button-clickwheel.c b/firmware/target/arm/ipod/button-clickwheel.c
index 580f95a453..4dfa4c0a6b 100644
--- a/firmware/target/arm/ipod/button-clickwheel.c
+++ b/firmware/target/arm/ipod/button-clickwheel.c
@@ -39,7 +39,7 @@
#include "serial.h"
#include "power.h"
#include "powermgmt.h"
-#if defined(IPOD_NANO2G)
+#if defined(IPOD_NANO2G) || defined(IPOD_6G)
#include "pmu-target.h"
#endif
@@ -49,18 +49,8 @@
#ifdef CPU_PP
#define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x7000c140))
-#elif CONFIG_CPU==S5L8701
-#define PCON15 (*((volatile uint32_t*)(0x3CF000F0)))
-#define PUNK15 (*((volatile uint32_t*)(0x3CF000FC)))
-#define WHEEL00 (*((volatile uint32_t*)(0x3C200000)))
-#define WHEEL04 (*((volatile uint32_t*)(0x3C200004)))
-#define WHEEL08 (*((volatile uint32_t*)(0x3C200008)))
-#define WHEEL0C (*((volatile uint32_t*)(0x3C20000C)))
-#define WHEEL10 (*((volatile uint32_t*)(0x3C200010)))
-#define WHEELINT (*((volatile uint32_t*)(0x3C200014)))
-#define WHEELRX (*((volatile uint32_t*)(0x3C200018)))
-#define WHEELTX (*((volatile uint32_t*)(0x3C20001C)))
-#define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x3c200018))
+#elif CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702
+#define CLICKWHEEL_DATA WHEELRX
#else
#error CPU architecture not supported!
#endif
@@ -93,7 +83,7 @@ int int_btn = BUTTON_NONE;
static bool send_events = true;
#endif
-#if CONFIG_CPU==S5L8701
+#if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702
static struct wakeup button_init_wakeup;
#endif
@@ -265,7 +255,7 @@ static inline int ipod_4g_button_read(void)
}
}
-#if CONFIG_CPU==S5L8701
+#if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702
else if ((status & 0x8000FFFF) == 0x8000023A)
{
if (status & 0x00010000)
@@ -345,7 +335,7 @@ bool headphones_inserted(void)
return (GPIOA_INPUT_VAL & 0x80)?true:false;
}
#else
-void INT_SPI(void)
+void INT_WHEEL(void)
{
int clickwheel_events = WHEELINT;
@@ -359,6 +349,7 @@ void INT_SPI(void)
void s5l_clickwheel_init(void)
{
+#if CONFIG_CPU==S5L8701
PWRCONEXT &= ~1;
PCON15 = (PCON15 & ~0xFFFF0000) | 0x22220000;
PUNK15 = 0xF0;
@@ -370,24 +361,35 @@ void s5l_clickwheel_init(void)
WHEELTX = 0x8000023A;
WHEEL04 |= 1;
PDAT10 &= ~2;
+#elif CONFIG_CPU==S5L8702
+ //TODO: Implement
+#endif
}
void button_init_device(void)
{
wakeup_init(&button_init_wakeup);
+#if CONFIG_CPU==S5L8701
INTMSK |= (1<<26);
+#elif CONFIG_CPU==S5L8702
+ //TODO: Implement
+#endif
s5l_clickwheel_init();
wakeup_wait(&button_init_wakeup, HZ / 10);
}
bool button_hold(void)
{
- return ((PDAT14 & (1 << 6)) == 0);
+ //TODO: Implement
+ //return ((PDAT14 & (1 << 6)) == 0);
+ return false;
}
bool headphones_inserted(void)
{
- return ((PDAT14 & (1 << 5)) != 0);
+ //TODO: Implement
+ //return ((PDAT14 & (1 << 5)) == 0);
+ return false;
}
#endif
@@ -419,6 +421,8 @@ int button_read_device(void)
WHEEL00 = 0;
WHEEL10 = 0;
PWRCONEXT |= 1;
+#elif CONFIG_CPU==S5L8702
+ //TODO: Implement
#endif
}
else
@@ -430,6 +434,8 @@ int button_read_device(void)
#elif CONFIG_CPU==S5L8701
pmu_ldo_power_on(1); /* enable clickwheel power supply */
s5l_clickwheel_init();
+#elif CONFIG_CPU==S5L8702
+ //TODO: Implement
#endif
}
}
diff --git a/firmware/target/arm/usb-s3c6400x.c b/firmware/target/arm/usb-s3c6400x.c
index e94c54f086..ba3b69a02e 100644
--- a/firmware/target/arm/usb-s3c6400x.c
+++ b/firmware/target/arm/usb-s3c6400x.c
@@ -24,15 +24,13 @@
#include "usb-target.h"
#include "usb_drv.h"
-#define OTGBASE 0x38800000
-#define PHYBASE 0x3C400000
-#include "usb-s3c6400x.h"
-
#include "cpu.h"
#include "system.h"
#include "kernel.h"
#include "panic.h"
+#include "usb-s3c6400x.h"
+
#ifdef HAVE_USBSTACK
#include "usb_ch9.h"
#include "usb_core.h"
@@ -72,7 +70,7 @@ static void reset_endpoints(int reinit)
DOEPCTL0 = 0x8000; /* EP0 OUT ACTIVE */
DOEPTSIZ0 = 0x20080040; /* EP0 OUT Transfer Size:
64 Bytes, 1 Packet, 1 Setup Packet */
- DOEPDMA0 = (uint32_t)&ctrlreq;
+ DOEPDMA0 = &ctrlreq;
DOEPCTL0 |= 0x84000000; /* EP0 OUT ENABLE CLEARNAK */
if (reinit)
{
@@ -139,10 +137,13 @@ static void usb_reset(void)
DCTL = 0x802; /* Soft Disconnect */
OPHYPWR = 0; /* PHY: Power up */
+ OPHYUNK1 = 1;
+ OPHYUNK2 = 0xE3F;
+ OPHYCLK = SYNOPSYSOTG_CLOCK;
ORSTCON = 1; /* PHY: Assert Software Reset */
for (i = 0; i < 50; i++);
ORSTCON = 0; /* PHY: Deassert Software Reset */
- OPHYCLK = 0; /* PHY: 48MHz clock */
+ OPHYUNK3 = 0x600;
GRSTCTL = 1; /* OTG: Assert Software Reset */
while (GRSTCTL & 1); /* Wait for OTG to ack reset */
@@ -150,7 +151,7 @@ static void usb_reset(void)
GRXFSIZ = 0x00000200; /* RX FIFO: 512 bytes */
GNPTXFSIZ = 0x02000200; /* Non-periodic TX FIFO: 512 bytes */
- GAHBCFG = 0x27; /* OTG AHB config: Unmask ints, burst length 4, DMA on */
+ GAHBCFG = SYNOPSYSOTG_AHBCFG;
GUSBCFG = 0x1408; /* OTG: 16bit PHY and some reserved bits */
DCFG = 4; /* Address 0 */
@@ -375,12 +376,16 @@ void usb_drv_stall(int endpoint, bool stall, bool in)
void usb_drv_init(void)
{
/* Enable USB clock */
+#if CONFIG_CPU==S5L8701
PWRCON &= ~0x4000;
PWRCONEXT &= ~0x800;
- PCGCCTL = 0;
-
- /* unmask irq */
INTMSK |= INTMSK_USB_OTG;
+#elif CONFIG_CPU==S5L8702
+ PWRCON(0) &= ~0x4;
+ PWRCON(1) &= ~0x8;
+ VIC0INTENABLE |= 1 << 19;
+#endif
+ PCGCCTL = 0;
/* reset the beast */
usb_reset();
@@ -394,8 +399,13 @@ void usb_drv_exit(void)
PCGCCTL = 1; /* Shut down PHY clock */
OPHYPWR = 0xF; /* PHY: Power down */
+#if CONFIG_CPU==S5L8701
PWRCON |= 0x4000;
PWRCONEXT |= 0x800;
+#elif CONFIG_CPU==S5L8702
+ PWRCON(0) |= 0x4;
+ PWRCON(1) |= 0x8;
+#endif
}
void usb_init_device(void)
@@ -406,10 +416,16 @@ void usb_init_device(void)
/* Power up the core clocks to allow writing
to some registers needed to power it down */
+ PCGCCTL = 0;
+#if CONFIG_CPU==S5L8701
PWRCON &= ~0x4000;
PWRCONEXT &= ~0x800;
- PCGCCTL = 0;
INTMSK |= INTMSK_USB_OTG;
+#elif CONFIG_CPU==S5L8702
+ PWRCON(0) &= ~0x4;
+ PWRCON(1) &= ~0x8;
+ VIC0INTENABLE |= 1 << 19;
+#endif
usb_drv_exit();
}
@@ -441,8 +457,13 @@ void usb_init_device(void)
PCGCCTL = 1; /* Shut down PHY clock */
OPHYPWR = 0xF; /* PHY: Power down */
+#if CONFIG_CPU==S5L8701
PWRCON |= 0x4000;
PWRCONEXT |= 0x800;
+#elif CONFIG_CPU==S5L8702
+ PWRCON(0) |= 0x4;
+ PWRCON(1) |= 0x8;
+#endif
}
void usb_enable(bool on)