summaryrefslogtreecommitdiffstats
path: root/firmware/target/arm
diff options
context:
space:
mode:
authorBertrik Sikken <bertrik@sikken.nl>2009-06-27 20:11:11 +0000
committerBertrik Sikken <bertrik@sikken.nl>2009-06-27 20:11:11 +0000
commitc33373e163f63913fbb79ea66b73f2f9e07ebf79 (patch)
treeda23dd050f0c5fa5275cd2bb41345c69e57d4898 /firmware/target/arm
parent660daa51d43b87de475023bd9ec84933169cfe7e (diff)
downloadrockbox-c33373e163f63913fbb79ea66b73f2f9e07ebf79.tar.gz
rockbox-c33373e163f63913fbb79ea66b73f2f9e07ebf79.zip
S5L8700: implement i2c driver (used for communicating with the RTC and the codec in the meizus)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21533 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/s5l8700/i2c-s5l8700.c136
1 files changed, 136 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8700/i2c-s5l8700.c b/firmware/target/arm/s5l8700/i2c-s5l8700.c
new file mode 100644
index 0000000000..564bfdd4bd
--- /dev/null
+++ b/firmware/target/arm/s5l8700/i2c-s5l8700.c
@@ -0,0 +1,136 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2009 by Bertrik Sikken
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "config.h"
+#include "system.h"
+#include "kernel.h"
+#include "i2c-s5l8700.h"
+
+/* Driver for the s5l8700 built-in I2C controller in master mode
+
+ Both the i2c_read and i2c_write function take the following arguments:
+ * slave, the address of the i2c slave device to read from / write to
+ * address, optional sub-address in the i2c slave (unused if -1)
+ * len, number of bytes to be transfered
+ * data, pointer to data to be transfered
+ A return value < 0 indicates an error.
+
+ Known issues:
+ * uses polled mode (not interrupt driven), just like the OF
+ * ACK from slave is not checked, so functions never return an error
+*/
+
+static struct mutex i2c_mtx;
+
+void i2c_init(void)
+{
+ mutex_init(&i2c_mtx);
+
+ /* enable I2C pins */
+ PCON10 = (2 << 2) |
+ (2 << 0);
+
+ /* enable I2C clock */
+ PWRCON &= ~(1 << 5);
+
+ /* initial config */
+ IICADD = 0;
+ IICCON = (1 << 7) | /* ACK_GEN */
+ (1 << 6) | /* CLKSEL = PCLK/512 */
+ (1 << 5) | /* INT_EN */
+ (1 << 4) | /* IRQ clear */
+ (3 << 0); /* CK_REG */
+
+ /* serial output on */
+ IICSTAT = (1 << 4);
+}
+
+int i2c_write(unsigned char slave, int address, int len, const unsigned char *data)
+{
+ mutex_lock(&i2c_mtx);
+
+ /* START */
+ IICDS = slave & ~1;
+ IICSTAT = 0xF0;
+ IICCON = 0xF3;
+ while ((IICCON & (1 << 4)) == 0);
+
+ if (address >= 0) {
+ /* write address */
+ IICDS = address;
+ IICCON = 0xF3;
+ while ((IICCON & (1 << 4)) == 0);
+ }
+
+ /* write data */
+ while (len--) {
+ IICDS = *data++;
+ IICCON = 0xF3;
+ while ((IICCON & (1 << 4)) == 0);
+ }
+
+ /* STOP */
+ IICSTAT = 0xD0;
+ IICCON = 0xF3;
+ while ((IICSTAT & (1 << 5)) != 0);
+
+ mutex_unlock(&i2c_mtx);
+ return 0;
+}
+
+int i2c_read(unsigned char slave, int address, int len, unsigned char *data)
+{
+ mutex_lock(&i2c_mtx);
+
+ if (address >= 0) {
+ /* START */
+ IICDS = slave & ~1;
+ IICSTAT = 0xF0;
+ IICCON = 0xF3;
+ while ((IICCON & (1 << 4)) == 0);
+
+ /* write address */
+ IICDS = address;
+ IICCON = 0xF3;
+ while ((IICCON & (1 << 4)) == 0);
+ }
+
+ /* (repeated) START */
+ IICDS = slave | 1;
+ IICSTAT = 0xB0;
+ IICCON = 0xF3;
+ while ((IICCON & (1 << 4)) == 0);
+
+ while (len--) {
+ IICCON = (len == 0) ? 0x73 : 0xF3; /* NACK or ACK */
+ while ((IICCON & (1 << 4)) == 0);
+ *data++ = IICDS;
+ }
+
+ /* STOP */
+ IICSTAT = 0x90;
+ IICCON = 0xF3;
+ while ((IICSTAT & (1 << 5)) != 0);
+
+ mutex_unlock(&i2c_mtx);
+ return 0;
+}
+