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authorMichael Sevakis <jethead71@rockbox.org>2009-02-20 02:33:40 +0000
committerMichael Sevakis <jethead71@rockbox.org>2009-02-20 02:33:40 +0000
commitec67912b638e0fae3cae7b4182d23db6d36c5135 (patch)
tree8101f45d02947a828d20174a45d1a6d19fafa3b2 /firmware/target/arm
parent07ae1e4fb9a1fd9d6ce9c48c5300b53e87303937 (diff)
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Reclaim .iram areas in DRAM by overlapping their load addresses with the uninitialized data sections. I did what I could test out-- not any flash image linker scripts or other target processors. Move any .iram copies in crt0.S's to be the first operation even if not _strictly_ necessary to be emphatic (aka. 'beware').
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20061 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/crt0-pp.S25
-rw-r--r--firmware/target/arm/ipod/app.lds4
-rw-r--r--firmware/target/arm/iriver/app.lds4
-rw-r--r--firmware/target/arm/olympus/app.lds4
-rw-r--r--firmware/target/arm/philips/app.lds4
-rw-r--r--firmware/target/arm/sandisk/app.lds6
6 files changed, 24 insertions, 23 deletions
diff --git a/firmware/target/arm/crt0-pp.S b/firmware/target/arm/crt0-pp.S
index f698783017..210b560560 100644
--- a/firmware/target/arm/crt0-pp.S
+++ b/firmware/target/arm/crt0-pp.S
@@ -41,7 +41,6 @@ start:
.equ COP_CTRL, 0xcf004058
.equ CPU_STATUS, 0xcf004050
.equ COP_STATUS, 0xcf004050
- .equ IIS_CONFIG, 0xc0002500
.equ SLEEP, 0x000000ca
.equ WAKE, 0x000000ce
.equ CPUSLEEPING, 0x00008000
@@ -63,7 +62,6 @@ start:
.equ COP_ICLR, 0x60004038
.equ COP_CTRL, 0x60007004
.equ COP_STATUS, 0x60007004
- .equ IIS_CONFIG, 0x70002800
.equ SLEEP, 0x80000000
.equ WAKE, 0x00000000
.equ CPUSLEEPING, 0x80000000
@@ -186,6 +184,9 @@ cpu_init:
ldr r3, [r4]
tst r3, #COPSLEEPING
beq 1b
+
+ /* Vectors and IRAM copy is done first since they are reclaimed for
+ * other uninitialized sections */
/* Copy exception handler code to address 0 */
ldr r2, =_vectorsstart
@@ -196,16 +197,7 @@ cpu_init:
ldrhi r5, [r4], #4
strhi r5, [r2], #4
bhi 1b
-
- /* Zero out IBSS */
- ldr r2, =_iedata
- ldr r3, =_iend
- mov r4, #0
-1:
- cmp r3, r2
- strhi r4, [r2], #4
- bhi 1b
-
+
/* Copy the IRAM */
ldr r2, =_iramcopy
ldr r3, =_iramstart
@@ -216,6 +208,15 @@ cpu_init:
strhi r5, [r3], #4
bhi 1b
+ /* Zero out IBSS */
+ ldr r2, =_iedata
+ ldr r3, =_iend
+ mov r4, #0
+1:
+ cmp r3, r2
+ strhi r4, [r2], #4
+ bhi 1b
+
/* Initialise bss section to zero */
ldr r2, =_edata
ldr r3, =_end
diff --git a/firmware/target/arm/ipod/app.lds b/firmware/target/arm/ipod/app.lds
index d7159e8e1e..22468192eb 100644
--- a/firmware/target/arm/ipod/app.lds
+++ b/firmware/target/arm/ipod/app.lds
@@ -103,6 +103,7 @@ SECTIONS
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
+ _noloaddram = LOADADDR(.vectors);
.ibss IRAMORIG (NOLOAD) :
{
@@ -148,8 +149,7 @@ SECTIONS
/* .bss and .ncbss are treated as a single section to use one init loop to
* zero it - note "_edata" and "_end" */
- .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\
- SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) :
+ .bss _noloaddram (NOLOAD) :
{
_edata = .;
*(.bss*)
diff --git a/firmware/target/arm/iriver/app.lds b/firmware/target/arm/iriver/app.lds
index d7159e8e1e..22468192eb 100644
--- a/firmware/target/arm/iriver/app.lds
+++ b/firmware/target/arm/iriver/app.lds
@@ -103,6 +103,7 @@ SECTIONS
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
+ _noloaddram = LOADADDR(.vectors);
.ibss IRAMORIG (NOLOAD) :
{
@@ -148,8 +149,7 @@ SECTIONS
/* .bss and .ncbss are treated as a single section to use one init loop to
* zero it - note "_edata" and "_end" */
- .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\
- SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) :
+ .bss _noloaddram (NOLOAD) :
{
_edata = .;
*(.bss*)
diff --git a/firmware/target/arm/olympus/app.lds b/firmware/target/arm/olympus/app.lds
index d7159e8e1e..22468192eb 100644
--- a/firmware/target/arm/olympus/app.lds
+++ b/firmware/target/arm/olympus/app.lds
@@ -103,6 +103,7 @@ SECTIONS
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
+ _noloaddram = LOADADDR(.vectors);
.ibss IRAMORIG (NOLOAD) :
{
@@ -148,8 +149,7 @@ SECTIONS
/* .bss and .ncbss are treated as a single section to use one init loop to
* zero it - note "_edata" and "_end" */
- .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\
- SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) :
+ .bss _noloaddram (NOLOAD) :
{
_edata = .;
*(.bss*)
diff --git a/firmware/target/arm/philips/app.lds b/firmware/target/arm/philips/app.lds
index d7159e8e1e..22468192eb 100644
--- a/firmware/target/arm/philips/app.lds
+++ b/firmware/target/arm/philips/app.lds
@@ -103,6 +103,7 @@ SECTIONS
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
+ _noloaddram = LOADADDR(.vectors);
.ibss IRAMORIG (NOLOAD) :
{
@@ -148,8 +149,7 @@ SECTIONS
/* .bss and .ncbss are treated as a single section to use one init loop to
* zero it - note "_edata" and "_end" */
- .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\
- SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) :
+ .bss _noloaddram (NOLOAD) :
{
_edata = .;
*(.bss*)
diff --git a/firmware/target/arm/sandisk/app.lds b/firmware/target/arm/sandisk/app.lds
index d7159e8e1e..3010644b72 100644
--- a/firmware/target/arm/sandisk/app.lds
+++ b/firmware/target/arm/sandisk/app.lds
@@ -103,6 +103,7 @@ SECTIONS
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
+ _noloaddram = LOADADDR(.vectors);
.ibss IRAMORIG (NOLOAD) :
{
@@ -145,11 +146,10 @@ SECTIONS
. += 0x2000;
stackend = .;
} > IRAM
-
+
/* .bss and .ncbss are treated as a single section to use one init loop to
* zero it - note "_edata" and "_end" */
- .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\
- SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) :
+ .bss _noloaddram (NOLOAD) :
{
_edata = .;
*(.bss*)