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authorBarry Wardell <rockbox@barrywardell.net>2007-02-21 22:25:14 +0000
committerBarry Wardell <rockbox@barrywardell.net>2007-02-21 22:25:14 +0000
commitf05b9e3bd560b897fd9d10e6206024dce78497cf (patch)
tree53b126c24823e13355bd882c0b0371c20c8565a5 /firmware/target/arm
parent011bc8934c2fdea4cb4a43ca6e597b7626a72b46 (diff)
downloadrockbox-f05b9e3bd560b897fd9d10e6206024dce78497cf.tar.gz
rockbox-f05b9e3bd560b897fd9d10e6206024dce78497cf.zip
Get rid of some outl/inl in favour of #define.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12442 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/pcm-pp.c8
-rw-r--r--firmware/target/arm/wmcodec-pp.c13
2 files changed, 10 insertions, 11 deletions
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index 9ee3acd94e..891213468c 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -208,7 +208,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
#if CONFIG_CPU == PP5020
/* setup I2S interrupt for FIQ */
outl(inl(0x6000402c) | I2S_MASK, 0x6000402c);
- outl(I2S_MASK, 0x60004024);
+ CPU_INT_EN = I2S_MASK;
#elif CONFIG_CPU == PP5024
#else
/* setup I2S interrupt for FIQ */
@@ -453,13 +453,13 @@ void pcm_rec_dma_start(void *addr, size_t size)
/* setup FIQ */
outl(inl(0x6000402c) | I2S_MASK, 0x6000402c);
- outl(I2S_MASK, 0x60004024);
+ CPU_INT_EN = I2S_MASK;
/* interrupt on full fifo */
- outl(inl(0x70002800) | 0x1, 0x70002800);
+ IISCONFIG |= 0x1;
/* enable record fifo */
- outl(inl(0x70002800) | 0x10000000, 0x70002800);
+ IISCONFIG |= 0x10000000;
set_fiq_handler(fiq_record);
enable_fiq();
diff --git a/firmware/target/arm/wmcodec-pp.c b/firmware/target/arm/wmcodec-pp.c
index d3fbed433a..e252cf0ac1 100644
--- a/firmware/target/arm/wmcodec-pp.c
+++ b/firmware/target/arm/wmcodec-pp.c
@@ -37,8 +37,7 @@
/*
- * Initialise the WM8975 for playback via headphone and line out.
- * Note, I'm using the WM8750 datasheet as its apparently close.
+ * Initialise the PP I2C and I2S.
*/
int audiohw_init(void) {
/* reset I2C */
@@ -46,21 +45,21 @@ int audiohw_init(void) {
#if CONFIG_CPU == PP5020
/* normal outputs for CDI and I2S pin groups */
- outl(inl(0x70000020) & ~0x300, 0x70000020);
+ DEV_INIT &= ~0x300;
/*mini2?*/
outl(inl(0x70000010) & ~0x3000000, 0x70000010);
/*mini2?*/
/* device reset */
- outl(inl(0x60006004) | 0x800, 0x60006004);
- outl(inl(0x60006004) & ~0x800, 0x60006004);
+ DEV_RS |= 0x800;
+ DEV_RS &=~0x800;
/* device enable */
- outl(inl(0x6000600C) | 0x807, 0x6000600C);
+ DEV_EN |= 0x807;
/* enable external dev clock clocks */
- outl(inl(0x6000600c) | 0x2, 0x6000600c);
+ DEV_EN |= 0x2;
/* external dev clock to 24MHz */
outl(inl(0x70000018) & ~0xc, 0x70000018);